From: David Wei <dw@davidwei.uk>
To: Wei Huang <wei.huang2@amd.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, netdev@vger.kernel.org
Cc: Jonathan.Cameron@Huawei.com, helgaas@kernel.org, corbet@lwn.net,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, alex.williamson@redhat.com,
gospo@broadcom.com, michael.chan@broadcom.com,
ajit.khaparde@broadcom.com, somnath.kotur@broadcom.com,
andrew.gospodarek@broadcom.com, manoj.panicker2@amd.com,
Eric.VanTassell@amd.com, vadim.fedorenko@linux.dev,
horms@kernel.org, bagasdotme@gmail.com, bhelgaas@google.com
Subject: Re: [PATCH V3 00/10] PCIe TPH and cache direct injection support
Date: Sat, 20 Jul 2024 12:25:21 -0700 [thread overview]
Message-ID: <6b8e2001-7f4a-40aa-a760-a4c709675fb6@davidwei.uk> (raw)
In-Reply-To: <20240717205511.2541693-1-wei.huang2@amd.com>
On 2024-07-17 13:55, Wei Huang wrote:
> Hi All,
>
> TPH (TLP Processing Hints) is a PCIe feature that allows endpoint devices to
> provide optimization hints for requests that target memory space. These hints,
> in a format called steering tag (ST), are provided in the requester's TLP
> headers and allow the system hardware, including the Root Complex, to
> optimize the utilization of platform resources for the requests.
>
> Upcoming AMD hardware implement a new Cache Injection feature that leverages
> TPH. Cache Injection allows PCIe endpoints to inject I/O Coherent DMA writes
> directly into an L2 within the CCX (core complex) closest to the CPU core that
> will consume it. This technology is aimed at applications requiring high
> performance and low latency, such as networking and storage applications.
This sounds very exciting Wei and it's good to see bnxt support. When
you say 'upcoming AMD hardware' are you able to share exactly which? I
would like to try this out.
next prev parent reply other threads:[~2024-07-20 19:25 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-17 20:55 [PATCH V3 00/10] PCIe TPH and cache direct injection support Wei Huang
2024-07-17 20:55 ` [PATCH V3 01/10] PCI: Introduce PCIe TPH support framework Wei Huang
2024-07-17 20:55 ` [PATCH V3 02/10] PCI: Add TPH related register definition Wei Huang
2024-07-23 22:33 ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 03/10] PCI/TPH: Add pci=notph to prevent use of TPH Wei Huang
2024-07-23 22:41 ` Bjorn Helgaas
2024-07-24 20:05 ` Wei Huang
2024-07-25 21:29 ` Bjorn Helgaas
2024-07-29 14:56 ` Wei Huang
2024-07-24 14:45 ` Alejandro Lucero Palau
2024-07-24 15:36 ` Bjorn Helgaas
2024-07-24 20:08 ` Wei Huang
2024-07-17 20:55 ` [PATCH V3 04/10] PCI/TPH: Add pci=nostmode to force No ST Mode Wei Huang
2024-07-23 22:44 ` Bjorn Helgaas
2024-08-02 4:29 ` Wei Huang
2024-08-02 17:05 ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 05/10] PCI/TPH: Introduce API to check interrupt vector mode support Wei Huang
2024-07-23 22:28 ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 06/10] PCI/TPH: Introduce API to retrieve TPH steering tags from ACPI Wei Huang
2024-07-23 22:22 ` Bjorn Helgaas
2024-08-02 4:58 ` Wei Huang
2024-08-02 16:58 ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 07/10] PCI/TPH: Introduce API to update TPH steering tags in PCIe devices Wei Huang
2024-07-23 23:15 ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 08/10] PCI/TPH: Add TPH documentation Wei Huang
2024-07-23 21:50 ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 09/10] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-07-23 16:48 ` Bjorn Helgaas
2024-08-02 5:44 ` Wei Huang
2024-08-02 17:00 ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 10/10] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang
2024-07-20 8:08 ` [PATCH V3 00/10] PCIe TPH and cache direct injection support Lukas Wunner
2024-07-22 14:44 ` Wei Huang
2024-07-22 14:58 ` Lukas Wunner
2024-07-20 19:25 ` David Wei [this message]
2024-07-22 15:38 ` Wei Huang
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