From: Alejandro Lucero Palau <alucerop@amd.com>
To: Jonathan Cameron <jonathan.cameron@huawei.com>,
alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
dave.jiang@intel.com, dan.j.williams@intel.com,
edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com,
Ben Cheatham <benjamin.cheatham@amd.com>,
Edward Cree <ecree.xilinx@gmail.com>
Subject: Re: [PATCH v24 02/11] cxl/sfc: Map cxl regs
Date: Tue, 24 Mar 2026 21:06:39 +0000 [thread overview]
Message-ID: <713bed44-0765-4ca0-96e2-7ab3b7078b07@amd.com> (raw)
In-Reply-To: <20260324163355.0000748d@huawei.com>
On 3/24/26 16:33, Jonathan Cameron wrote:
> On Mon, 23 Mar 2026 11:31:08 +0000
> alejandro.lucero-palau@amd.com wrote:
>
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Export cxl core functions for a Type2 driver being able to discover and
>> map the device registers.
>>
>> Use it in sfc driver cxl initialization.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
>> Reviewed-by: Ben Cheatham <benjamin.cheatham@amd.com>
>> Acked-by: Edward Cree <ecree.xilinx@gmail.com>
> One trivial thing that you might want to tidy up.
>
> Thanks,
>
> Jonathan
>
>
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
>> index 8e0481d8dced..7917118e4eba 100644
>> --- a/drivers/net/ethernet/sfc/efx_cxl.c
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
>> @@ -7,6 +7,8 @@
>>
>> #include <linux/pci.h>
>>
>> +#include <cxl/cxl.h>
>> +#include <cxl/pci.h>
>> #include "net_driver.h"
>> #include "efx_cxl.h"
>>
>> @@ -18,6 +20,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>> struct pci_dev *pci_dev = efx->pci_dev;
>> struct efx_cxl *cxl;
>> u16 dvsec;
>> + int rc;
>>
>> probe_data->cxl_pio_initialised = false;
>>
>> @@ -44,6 +47,30 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>> if (!cxl)
>> return -ENOMEM;
>>
>> + rc = cxl_pci_setup_regs(pci_dev, CXL_REGLOC_RBI_COMPONENT,
>> + &cxl->cxlds.reg_map);
>> + if (rc) {
>> + pci_err(pci_dev, "No component registers\n");
>> + return rc;
>> + }
>> +
>> + if (!cxl->cxlds.reg_map.component_map.hdm_decoder.valid) {
>> + pci_err(pci_dev, "Expected HDM component register not found\n");
>> + return -ENODEV;
>> + }
>> +
>> + if (!cxl->cxlds.reg_map.component_map.ras.valid) {
>> + pci_err(pci_dev, "Expected RAS component register not found\n");
>> + return -ENODEV;
>> + }
>> +
>> + /*
> Networking code. So wrong style.
>
> Ah the fun of patches that touch drivers/net and drivers/cxl :)
Good catch.
I'll fix it.
Thanks!
>> + * Set media ready explicitly as there are neither mailbox for checking
>> + * this state nor the CXL register involved, both not mandatory for
>> + * type2.
>> + */
>> + cxl->cxlds.media_ready = true;
>> +
>> probe_data->cxl = cxl;
>>
>> return 0;
next prev parent reply other threads:[~2026-03-24 21:06 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 11:31 [PATCH v24 00/11] Type2 device basic support alejandro.lucero-palau
2026-03-23 11:31 ` [PATCH v24 01/11] sfc: add cxl support alejandro.lucero-palau
2026-03-24 16:29 ` Jonathan Cameron
2026-03-24 21:05 ` Alejandro Lucero Palau
2026-03-23 11:31 ` [PATCH v24 02/11] cxl/sfc: Map cxl regs alejandro.lucero-palau
2026-03-24 16:33 ` Jonathan Cameron
2026-03-24 21:06 ` Alejandro Lucero Palau [this message]
2026-03-23 11:31 ` [PATCH v24 03/11] cxl/sfc: Initialize dpa without a mailbox alejandro.lucero-palau
2026-03-23 11:31 ` [PATCH v24 04/11] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2026-03-23 11:31 ` [PATCH v24 05/11] sfc: create type2 cxl memdev alejandro.lucero-palau
2026-03-23 11:31 ` [PATCH v24 06/11] cxl/hdm: Add support for getting region from committed decoder alejandro.lucero-palau
2026-03-24 16:48 ` Jonathan Cameron
2026-03-24 21:20 ` Alejandro Lucero Palau
2026-03-24 17:32 ` Dave Jiang
2026-03-24 21:55 ` Alejandro Lucero Palau
2026-03-27 19:36 ` Cheatham, Benjamin
2026-03-23 11:31 ` [PATCH v24 07/11] cxl: Add function for obtaining region range alejandro.lucero-palau
2026-03-27 19:36 ` Cheatham, Benjamin
2026-03-23 11:31 ` [PATCH v24 08/11] cxl: Export function for unwinding cxl by accelerators alejandro.lucero-palau
2026-03-24 16:50 ` Jonathan Cameron
2026-03-24 21:36 ` Alejandro Lucero Palau
2026-03-26 21:28 ` Cheatham, Benjamin
2026-03-27 19:36 ` Cheatham, Benjamin
2026-03-23 11:31 ` [PATCH v24 09/11] sfc: obtain decoder and region if committed by firmware alejandro.lucero-palau
2026-03-24 16:56 ` Jonathan Cameron
2026-03-24 21:43 ` Alejandro Lucero Palau
2026-03-24 17:38 ` Dave Jiang
2026-03-24 22:02 ` Alejandro Lucero Palau
2026-03-23 11:31 ` [PATCH v24 10/11] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2026-03-25 2:59 ` Alison Schofield
2026-03-23 11:31 ` [PATCH v24 11/11] sfc: support pio mapping based on cxl alejandro.lucero-palau
2026-03-23 22:18 ` Edward Cree
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