Re: [patch net-next 0/3] dpll: expose fractional frequency offset value to user

[Vadim Fedorenko <vadim.fedorenko@linux.dev>]

On 03/01/2024 13:28, Jiri Pirko wrote:
> From: Jiri Pirko <jiri@nvidia.com>
> 
> Allow to expose pin fractional frequency offset value over new DPLL
> generic netlink attribute. Add an op to get the value from the driver.
> Implement this new op in mlx5 driver.
> 
> Jiri Pirko (3):
>    dpll: expose fractional frequency offset value to user
>    net/mlx5: DPLL, Use struct to get values from
>      mlx5_dpll_synce_status_get()
>    net/mlx5: DPLL, Implement fractional frequency offset get pin op
> 
>   Documentation/netlink/specs/dpll.yaml         | 11 +++
>   drivers/dpll/dpll_netlink.c                   | 24 +++++
>   .../net/ethernet/mellanox/mlx5/core/dpll.c    | 94 ++++++++++++-------
>   include/linux/dpll.h                          |  3 +
>   include/uapi/linux/dpll.h                     |  1 +
>   5 files changed, 98 insertions(+), 35 deletions(-)
> 

Interesting attribute, it's good that hardware can expose this info.

Did you think about building some monitoring/alerts based on it?

For the series (I'm not sure if it's enough for mlx5, but the
refactoring looks nice):

Acked-By: Vadim Fedorenko <vadim.fedorenko@linux.dev>