From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC965C433E0 for ; Sat, 20 Jun 2020 18:17:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9CF152311B for ; Sat, 20 Jun 2020 18:17:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=cogentembedded-com.20150623.gappssmtp.com header.i=@cogentembedded-com.20150623.gappssmtp.com header.b="jiTaB2ld" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728386AbgFTSRE (ORCPT ); Sat, 20 Jun 2020 14:17:04 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:46686 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728369AbgFTSRD (ORCPT ); Sat, 20 Jun 2020 14:17:03 -0400 Received: by mail-lf1-f66.google.com with SMTP id m26so7360234lfo.13 for ; Sat, 20 Jun 2020 11:17:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=subject:to:cc:references:from:organization:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=ZYkYA7GIIhlmq6rZr8jPfVPdikjKFJ74S4uQrOZ8lX8=; b=jiTaB2ldE/0CqQAoMrgIJlY4sEHHGKkEqhV6Xq8/q37E+Tn8RpLWxg3sWKMjsWF6H4 576KqLJUFxuFdaUfH6dS6fMdtiHOj48gA8H3AVYMF9IOa8lm9fzvBcpAafzbr8oOlHNn ia2Qr8BKIM65Lr143XbZd93594eQzH1+GYVYXd/YUXcHmT5H5xpJY50L12DrmxZh9BJv H3rlsMSuUodIU+bV3RJ/Nu3b4MxndDppcW4IjF6R3QOl10/gl1hl2Yu/lHpGG4u/mAj4 taV9VU/fiFVM34OszxcPwph5u/Xb30CanL+9yVntWcpElrtmZW8pLLZlQm0cHLKt7ecN Tvjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:organization :message-id:date:user-agent:mime-version:in-reply-to :content-language:content-transfer-encoding; bh=ZYkYA7GIIhlmq6rZr8jPfVPdikjKFJ74S4uQrOZ8lX8=; b=O6hdyH7eemx5Z+GKrQM79/C5LlkeS9wXDooiRovmyjxzUKWXaUM94sniXfysspsWbz amrwR8P3BtLqrt5OlUkfEP9CJivYgVViIwg2XjXzOxoVDCYyDl+Gu+j+CIliGDV9iWgN 4ZYDrq15dJhbRVAkR/Rh3ntXTtm4cqCWZB2TYjw92ErHcklv5aS3H/P7eR9PmjDkYECD LgE6xY1Zdh/CWj4tPi1DAw7xlO9VZRNNfoz0qcMkGazgKWYwqpc2yiPtHnhAQ0eo7Ckd c+deeOAEKOyE5dsRZp//04w/9oQCMgLzx8A3GZWoeL4BLkd1aR4UfRwej/lKwvCQiE7B YcoA== X-Gm-Message-State: AOAM530ZS0Q/c6f1R/2IAFrC2wHAIB39jRaZ3T/0GvpFk6rvnRAY4AtU AYawcO3vhNndVfQSqKQNbhbHTA== X-Google-Smtp-Source: ABdhPJwYTcUhykaqUtrSppn7BOgc04zksumGxOWHqE0qSBOnw4nB+XC8v6UBOTPrOEbQ2rpLWP9HsA== X-Received: by 2002:ac2:52af:: with SMTP id r15mr2675378lfm.24.1592676961072; Sat, 20 Jun 2020 11:16:01 -0700 (PDT) Received: from wasted.cogentembedded.com ([2a00:1fa0:462b:c4af:1cf5:65ea:51a9:9da1]) by smtp.gmail.com with ESMTPSA id x64sm130214lff.14.2020.06.20.11.15.59 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 20 Jun 2020 11:16:00 -0700 (PDT) Subject: Re: [PATCH/RFC 1/5] dt-bindings: net: renesas,ravb: Document internal clock delay properties To: Geert Uytterhoeven , "David S . Miller" , Jakub Kicinski , Rob Herring Cc: Andrew Lunn , Oleksij Rempel , Philippe Schenker , Florian Fainelli , Heiner Kallweit , Kazuya Mizuguchi , Wolfram Sang , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org References: <20200619191554.24942-1-geert+renesas@glider.be> <20200619191554.24942-2-geert+renesas@glider.be> From: Sergei Shtylyov Organization: Cogent Embedded Message-ID: <75d3e6c2-9dbd-eec0-12e6-55eaef7c745a@cogentembedded.com> Date: Sat, 20 Jun 2020 21:15:59 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <20200619191554.24942-2-geert+renesas@glider.be> Content-Type: text/plain; charset=utf-8 Content-Language: en-MW Content-Transfer-Encoding: 7bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Hello! On 06/19/2020 10:15 PM, Geert Uytterhoeven wrote: > Some EtherAVB variants support internal clock delay configuration, which > can add larger delays than the delays that are typically supported by > the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps" > properties). > > Add properties for configuring the internal MAC delays. > These properties are mandatory, even when specified as zero, to > distinguish between old and new DTBs. > > Update the example accordingly. > > Signed-off-by: Geert Uytterhoeven > --- > .../devicetree/bindings/net/renesas,ravb.txt | 29 ++++++++++--------- > 1 file changed, 16 insertions(+), 13 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt > index 032b76f14f4fdb38..488ada78b6169b8e 100644 > --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt > +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt > @@ -64,6 +64,18 @@ Optional properties: > AVB_LINK signal. > - renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is > active-low instead of normal active-high. > +- renesas,rxc-delay-ps: Internal RX clock delay. > + This property is mandatory and valid only on R-Car Gen3 > + and RZ/G2 SoCs. > + Valid values are 0 and 1800. > + A non-zero value is allowed only if phy-mode = "rgmii". > + Zero is not supported on R-Car D3. Hm, where did you see about the D3 limitation? > +- renesas,txc-delay-ps: Internal TX clock delay. > + This property is mandatory and valid only on R-Car H3, > + M3-W, M3-W+, M3-N, V3M, and V3H, and RZ/G2M and RZ/G2N. > + Valid values are 0 and 2000. > + A non-zero value is allowed only if phy-mode = "rgmii". > + Zero is not supported on R-Car V3H. Same question about V3H here... [...] > @@ -105,8 +117,10 @@ Example: > "ch24"; > clocks = <&cpg CPG_MOD 812>; > power-domains = <&cpg>; > - phy-mode = "rgmii-id"; > + phy-mode = "rgmii"; > phy-handle = <&phy0>; > + renesas,rxc-delay-ps = <0>; Mhm, zero RX delay in RGMII-ID mode? > + renesas,txc-delay-ps = <2000>; > > pinctrl-0 = <ðer_pins>; > pinctrl-names = "default"; > @@ -115,18 +129,7 @@ Example: > #size-cells = <0>; > > phy0: ethernet-phy@0 { > - rxc-skew-ps = <900>; > - rxdv-skew-ps = <0>; > - rxd0-skew-ps = <0>; > - rxd1-skew-ps = <0>; > - rxd2-skew-ps = <0>; > - rxd3-skew-ps = <0>; > - txc-skew-ps = <900>; > - txen-skew-ps = <0>; > - txd0-skew-ps = <0>; > - txd1-skew-ps = <0>; > - txd2-skew-ps = <0>; > - txd3-skew-ps = <0>; > + rxc-skew-ps = <1500>; Ah, you're relying on a PHY? [...] MBR, Sergei