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[46.193.119.166]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4909ca6db64sm228497705e9.6.2026.06.01.01.30.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 01 Jun 2026 01:30:45 -0700 (PDT) Message-ID: <7b7616ef-026e-437b-89de-2a1f67356c5c@gmail.com> Date: Mon, 1 Jun 2026 10:30:36 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v7 1/3] net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata To: Nicolai Buchwitz Cc: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Marek Vasut , Maxime Chevallier , Simon Horman , Heiner Kallweit , Russell King , Tristram Ha , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Fidelio Lawson References: <20260524-ksz87xx_errata_low_loss_connections-v7-0-1cd49cfa24f0@exotec.com> <20260524-ksz87xx_errata_low_loss_connections-v7-1-1cd49cfa24f0@exotec.com> <77de607f2f8330ae6a593a4803887c8f@tipi-net.de> Content-Language: en-US From: Fidelio LAWSON In-Reply-To: <77de607f2f8330ae6a593a4803887c8f@tipi-net.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 5/28/26 09:19, Nicolai Buchwitz wrote: > Hi Fidelio > > On 24.5.2026 12:44, Fidelio Lawson wrote: >> Implement the "Module 3: Equalizer fix for short cables" erratum from >> Microchip document DS80000687C for KSZ87xx switches. > > The commit message says this implements Module 3 from DS80000687C, but > the errata's Work Around 1 writes 0x15 to indirect register 0x3C > ("PHY equalizer register"), and the patch never touches 0x3C. Could you > please clarify which document the register addresses > (KSZ87XX_REG_DSP_EQ = 0x08, KSZ87XX_REG_PHY_LPF = 0x4C) come from? > > I checked against the the following document: > https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ > ProductDocuments/Errata/KSZ87xx-Errata-DS80000687C.pdf > Hi Nicolai, Thanks for the review. Regarding the register addresses the definitions used in the implementation are based on the following Microchip support article: https://support.microchip.com/s/article/Solution-for-Using-CAT-5E-or-CAT-6-Short-Cable-with-a-Link-Issue-for-the-KSZ8795-Family I'll add that clarification to the commit message. > This silently returns when enable = false and nothing is written to the > registers. > Either I'm missing something or the short-cable preset cannot be cleared > through this tunable? > You are correct that the current implementation does not restore any configuration when 'enable' is set to false. In the next revision, I will update this to apply the default settings when disabling the preset, so that the tunable behaves as a proper reversible configuration. Thanks again for pointing these out. Best regards, Fidelio