From: Florian Fainelli <f.fainelli@gmail.com>
To: Vladimir Oltean <olteanv@gmail.com>,
davem@davemloft.net, jakub.kicinski@netronome.com,
linux@armlinux.org.uk, andrew@lunn.ch, vivien.didelot@gmail.com
Cc: alexandru.marginean@nxp.com, claudiu.manoil@nxp.com,
xiaoliang.yang_1@nxp.com, yangbo.lu@nxp.com,
netdev@vger.kernel.org, alexandre.belloni@bootlin.com,
horatiu.vultur@microchip.com, UNGLinuxDriver@microchip.com,
Vladimir Oltean <vladimir.oltean@nxp.com>
Subject: Re: [PATCH v5 net-next 5/9] enetc: Make MDIO accessors more generic and export to include/linux/fsl
Date: Mon, 6 Jan 2020 11:35:14 -0800 [thread overview]
Message-ID: <8718ea22-d1aa-fe58-bd69-521eeee5190a@gmail.com> (raw)
In-Reply-To: <20200106013417.12154-6-olteanv@gmail.com>
On 1/5/20 5:34 PM, Vladimir Oltean wrote:
> From: Claudiu Manoil <claudiu.manoil@nxp.com>
>
> Within the LS1028A SoC, the register map for the ENETC MDIO controller
> is instantiated a few times: for the central (external) MDIO controller,
> for the internal bus of each standalone ENETC port, and for the internal
> bus of the Felix switch.
>
> Refactoring is needed to support multiple MDIO buses from multiple
> drivers. The enetc_hw structure is made an opaque type and a smaller
> enetc_mdio_priv is created.
>
> 'mdio_base' - MDIO registers base address - is being parameterized, to
> be able to work with different MDIO register bases.
>
> The ENETC MDIO bus operations are exported from the fsl-enetc-mdio
> kernel object, the same that registers the central MDIO controller (the
> dedicated PF). The ENETC main driver has been changed to select it, and
> use its exported helpers to further register its private MDIO bus. The
> DSA Felix driver will do the same.
This series has already been applied so this may be food for thought at
this point, but why was not the solution to create a standalone mii_bus
driver and have all consumers be pointed it?
It is not uncommon for MDIO controllers to be re-used and integrated
within a larger block and when that happens whoever owns the largest
address space, say the Ethernet MAC can request the large resource
region and the MDIO bus controler can work on that premise, that's what
we did with genet/bcmmii.c and mdio-bcm-unimac.c for instance (so we
only do an ioremap, not request_mem_region + ioremap).
Your commit message does not provide a justification for why this
abstraction (mii_bus) was not suitable or considered here. Do you think
that could be changed?
Thanks!
--
Florian
next prev parent reply other threads:[~2020-01-06 19:35 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-06 1:34 [PATCH v5 net-next 0/9] Convert Felix DSA switch to PHYLINK Vladimir Oltean
2020-01-06 1:34 ` [PATCH v5 net-next 1/9] mii: Add helpers for parsing SGMII auto-negotiation Vladimir Oltean
2020-01-06 1:34 ` [PATCH v5 net-next 2/9] net: phylink: make QSGMII a valid PHY mode for in-band AN Vladimir Oltean
2020-01-06 1:34 ` [PATCH v5 net-next 3/9] net: phylink: add support for polling MAC PCS Vladimir Oltean
2020-01-06 1:34 ` [PATCH v5 net-next 4/9] net: dsa: Pass pcs_poll flag from driver to PHYLINK Vladimir Oltean
2020-01-06 1:34 ` [PATCH v5 net-next 5/9] enetc: Make MDIO accessors more generic and export to include/linux/fsl Vladimir Oltean
2020-01-06 19:35 ` Florian Fainelli [this message]
2020-01-06 23:00 ` Vladimir Oltean
2020-01-07 4:56 ` Florian Fainelli
2020-01-07 9:46 ` Vladimir Oltean
2020-01-07 19:22 ` Florian Fainelli
2020-01-06 1:34 ` [PATCH v5 net-next 6/9] enetc: Set MDIO_CFG_HOLD to the recommended value of 2 Vladimir Oltean
2020-01-06 1:34 ` [PATCH v5 net-next 7/9] net: mscc: ocelot: make phy_mode a member of the common struct ocelot_port Vladimir Oltean
2020-01-06 1:34 ` [PATCH v5 net-next 8/9] net: mscc: ocelot: export ANA, DEV and QSYS registers to include/soc/mscc Vladimir Oltean
2020-01-06 1:34 ` [PATCH v5 net-next 9/9] net: dsa: felix: Add PCS operations for PHYLINK Vladimir Oltean
2020-01-08 12:47 ` Arnd Bergmann
2020-01-06 7:22 ` [PATCH v5 net-next 0/9] Convert Felix DSA switch to PHYLINK David Miller
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