From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C021543C06D for ; Wed, 21 Jan 2026 08:15:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768983315; cv=none; b=hn4ht9TOMZ5uSqPvTEBFQphKphimQyQUxS7tHDw3UsbCPYuCxdvXeLTwqnOUlOrBUuKlzhPmOyH+Q/4fEEQ4xNqr2lWn2ChmE41f1GNsg08QPVxa2UtnZt/7djV/sg5yMoQjptMKlTOi4SYvqs3k+QS/HhopN6BjCWZBDbU7tXY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768983315; c=relaxed/simple; bh=pU4aApN+W+Q2oftkBig1imZGm/hVUTq4yYFgQ7KJORA=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=uJr/U7Wm/A/J/4RMoxg3h6ozWbmd8lupDPXBC/3MMiMJDvnFFpra8vCrZUaKx79D1GbpCym7LR2g2QSZ8NJ0m2dPoK4FHQtyi82e1DCzR93fU3lNUtvLQLZdlXz+oj/bzCoot3SmyOZBNgJ7w722neDfLZAMtJ6e0P6PAXQA+yI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=suse.de; spf=pass smtp.mailfrom=suse.de; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=suse.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.de Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 0B0ED5BCCA; Wed, 21 Jan 2026 08:15:11 +0000 (UTC) Authentication-Results: smtp-out2.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 5AF593EA63; Wed, 21 Jan 2026 08:15:10 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id XS7yFA6LcGn7cAAAD6G6ig (envelope-from ); Wed, 21 Jan 2026 08:15:10 +0000 Date: Wed, 21 Jan 2026 09:15:09 +0100 Message-ID: <878qdrs7oy.wl-tiwai@suse.de> From: Takashi Iwai To: Vivian Wang Cc: Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Alex Deucher , Christian =?ISO-8859-1?Q?K=F6nig?= , David Airlie , Simona Vetter , "Creeley, Brett" , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , Jaroslav Kysela , Takashi Iwai , Han Gao , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-sound@vger.kernel.org, linux-riscv@lists.infradead.org, sophgo@lists.linux.dev Subject: Re: [PATCH v2 4/4] ALSA: hda/intel: Raise msi_addr_mask to dma_bits In-Reply-To: <20260121-pci-msi-addr-mask-v2-4-f42593168989@iscas.ac.cn> References: <20260121-pci-msi-addr-mask-v2-0-f42593168989@iscas.ac.cn> <20260121-pci-msi-addr-mask-v2-4-f42593168989@iscas.ac.cn> User-Agent: Wanderlust/2.15.9 (Almost Unreal) Emacs/30.1 Mule/6.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Score: -4.00 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Queue-Id: 0B0ED5BCCA X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Spam-Level: X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; TAGGED_RCPT(0.00)[netdev] X-Spam-Flag: NO On Wed, 21 Jan 2026 04:49:40 +0100, Vivian Wang wrote: > > The code was originally written using no_64bit_msi, which restricts the > device to 32-bit MSI addresses. > > Since msi_addr_mask is introduced, use DMA_BIT_MASK(dma_bits) instead of > DMA_BIT_MASK(32) here for msi_addr_mask, describing the restriction more > precisely and allowing these devices to work on platforms with MSI > doorbell address above 32-bit space, as long as it is within the > hardware's addressable space. > > Signed-off-by: Vivian Wang > > --- > v2: No changes > > hda/intel maintainers: I don't know if this is the correct restriction. > Please help with checking. Thanks. The quirk is used only for AMD graphics chips, so this should (hopefully) work. Acked-by: Takashi Iwai thanks, Takashi