Re: [RFC PATCH 6/9] net: dsa: hellcreek: Add debugging mechanisms

[Kurt Kanzenbach <kurt@linutronix.de>]

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On Fri Jun 19 2020, Andrew Lunn wrote:
>> > Are trace registers counters?
>> 
>> No. The trace registers provide bits for error conditions and if packets
>> have been dropped e.g. because of full queues or FCS errors, and so on.
>
> Is there some documentation somewhere? A better understanding of what
> they can do might help figure out the correct API.

No, not that I'm aware of.

Actually there are a few more debugging mechanisms and features which
should be exposed somehow. Here's the list:

 * Trace registers for the error conditions. This feature needs to be
   configured for which ports should be traced
 * Memory registers for indicating how many free page and meta pointers
   are available (read-only)
 * Limit registers for configuring:
   * Maximum memory limit per port
   * Reserved memory for critical traffic
   * Background traffic rate
   * Maximum queue depth
 * Re-prioritization of packets based on the ether type (not mac address)
 * Packet logging (-> retrieval of packet time stamps) based on port, traffic class and direction
 * Queue tracking

What API would be useful for these mechanisms?

Thanks,
Kurt

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