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From: Thomas Gleixner <tglx@linutronix.de>
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To: Bjorn Helgaas <helgaas@kernel.org>, Dullfire <dullfire@yahoo.com>
Cc: davem@davemloft.net, sparclinux@vger.kernel.org, netdev@vger.kernel.org,
 linux-pci@vger.kernel.org
Subject: Re: Kernel panic with niu module
In-Reply-To: <20241104234412.GA1446170@bhelgaas>
References: <20241104234412.GA1446170@bhelgaas>
Date: Wed, 06 Nov 2024 16:36:21 +0100
Message-ID: <87fro4pe6i.ffs@tglx>
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On Mon, Nov 04 2024 at 17:44, Bjorn Helgaas wrote:
> On Mon, Nov 04, 2024 at 05:34:42AM -0600, Dullfire wrote:
>> I have also bisected the kernel, and determined that  upstream commit
>> 7d5ec3d3612396dc6d4b76366d20ab9fc06f399f revealed this issue. This commit
>> adds read to the mask status before any write to PCI_MSIX_ENTRY_DATA, thus
>> provoking the issue.

7d5ec3d36123 had the mask_all() invocation _before_ setting up the the
entries and reading back the descriptors. So that commit cannot break
the niu device when your problem analysis is correct.

83dbf898a2d4 moved the mask_all() invocation after setting up MSI-X into
the success path to handle a bonkers Marvell NVME device. That then
matches your problem desription as the read proceeds the write.

I've never heard of a similiar problem, so I'm pretty sure that's truly
niu specific.

Thanks,

        tglx