From: "Bjørn Mork" <bjorn@mork.no>
To: Liviu Dudau <liviu@dudau.co.uk>
Cc: Chandrashekar Devegowda <chandrashekar.devegowda@intel.com>,
Haijun Liu <haijun.liu@mediatek.com>,
Chiranjeevi Rapolu <chiranjeevi.rapolu@linux.intel.com>,
M Chetan Kumar <m.chetan.kumar@linux.intel.com>,
Ricardo Martinez <ricardo.martinez@linux.intel.com>,
Loic Poulain <loic.poulain@linaro.org>,
Sergey Ryazanov <ryazanov.s.a@gmail.com>,
Johannes Berg <johannes@sipsolutions.net>,
"David S. Miller" <davem@davemloft.net>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: net: wwan: t7xx: BUG: Unaligned access when loading mtk_t7xx module
Date: Fri, 22 Mar 2024 13:00:22 +0100 [thread overview]
Message-ID: <87il1ezdbd.fsf@miraculix.mork.no> (raw)
In-Reply-To: <Zfxlj3pYUk4ys47T@bart.dudau.co.uk> (Liviu Dudau's message of "Thu, 21 Mar 2024 16:51:27 +0000")
Liviu Dudau <liviu@dudau.co.uk> writes:
> I had a
> go at guessing that UL registers are at 0x8 and 0x48 offsets and DL
> registers are at 0x0478 and 0x04b8, but while that fixes the alignment
> exception, I now get a "CLDMA{0,1} queue 0 is not empty" message.
I don't think you can assume the register offsets are wrong. It looks
more like the device doesn't care about alignment.
But given that the driver includes <linux/io-64-nonatomic-lo-hi.h>, you
can probably replace those unaligned 64bit accesses with two nonatomic
32bit accesses.
Bjørn
next prev parent reply other threads:[~2024-03-22 12:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-21 16:51 net: wwan: t7xx: BUG: Unaligned access when loading mtk_t7xx module Liviu Dudau
2024-03-22 12:00 ` Bjørn Mork [this message]
2024-03-22 12:25 ` Liviu Dudau
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