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[98.128.236.82]) by smtp.gmail.com with ESMTPSA id s22sm2995503lfi.187.2020.12.07.13.19.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Dec 2020 13:19:48 -0800 (PST) From: Tobias Waldekranz To: Andrew Lunn Cc: davem@davemloft.net, kuba@kernel.org, vivien.didelot@gmail.com, f.fainelli@gmail.com, olteanv@gmail.com, j.vosburgh@gmail.com, vfalico@gmail.com, andy@greyhouse.net, netdev@vger.kernel.org Subject: Re: [PATCH v3 net-next 2/4] net: dsa: Link aggregation support In-Reply-To: <20201204022025.GC2414548@lunn.ch> References: <20201202091356.24075-1-tobias@waldekranz.com> <20201202091356.24075-3-tobias@waldekranz.com> <20201204022025.GC2414548@lunn.ch> Date: Mon, 07 Dec 2020 22:19:47 +0100 Message-ID: <87v9dd5n64.fsf@waldekranz.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, Dec 04, 2020 at 03:20, Andrew Lunn wrote: >> +static int dsa_tree_setup_lags(struct dsa_switch_tree *dst) >> +{ >> + struct dsa_port *dp; >> + unsigned int num; >> + >> + list_for_each_entry(dp, &dst->ports, list) >> + num = dp->ds->num_lags; >> + >> + list_for_each_entry(dp, &dst->ports, list) >> + num = min(num, dp->ds->num_lags); > > Do you really need to loop over the list twice? Cannot num be > initialised to UINT_MAX and then just do the second loop. I was mostly paranoid about the case where, for some reason, the list of ports was empty due to an invalid DT or something. But I now see that since num is not initialized, that would not have helped. So, is my paranoia valid, i.e. fix is `unsigned int num = 0`? Or can that never happen, i.e. fix is to initialize to UINT_MAX and remove first loop? >> +static inline bool dsa_port_can_offload(struct dsa_port *dp, >> + struct net_device *dev) > > That name is a bit generic. We have a number of different offloads. > The mv88E6060 cannot offload anything! The name is intentionally generic as it answers the question "can this dp offload requests for this netdev?" >> +{ >> + /* Switchdev offloading can be configured on: */ >> + >> + if (dev == dp->slave) >> + /* DSA ports directly connected to a bridge. */ >> + return true; This condition is the normal case of a bridged port, i.e. no LAG involved. >> + if (dp->lag && dev == rtnl_dereference(dp->lag->dev)) >> + /* DSA ports connected to a bridge via a LAG */ >> + return true; And then the indirect case of a bridged port under a LAG. I am happy to take requests for a better name though. >> + return false; >> +} > >> +static void dsa_lag_put(struct dsa_switch_tree *dst, struct dsa_lag *lag) >> +{ >> + if (!refcount_dec_and_test(&lag->refcount)) >> + return; >> + >> + clear_bit(lag->id, dst->lags.busy); >> + WRITE_ONCE(lag->dev, NULL); >> + memset(lag, 0, sizeof(*lag)); >> +} > > I don't know what the locking is here, but wouldn't it be safer to > clear the bit last, after the memset and WRITE_ONCE. All writers of dst->lags.busy are serialized with respect to dsa_lag_put (on rtnl_lock), and concurrent readers (dsa_lag_dev_by_id) start by checking busy before reading lag->dev. To my understanding, WRITE_ONCE would insert the proper fence to make sure busy was cleared before clearing dev? > Andrew