From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 495A4402B98; Fri, 1 May 2026 17:06:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777655211; cv=none; b=bRlMxenRpRGk+6JB1u01QD/24wsM4xJ0e4CemSoX1rA+By2lXSmN6rM491a3fSb3EjJnz95j8d2/s4lQgBEeKpJzFG8kFMa5cnIK7POafzx+9TDJ7Ms6qzvg7hunU23UiXdYCWvBHRqAD+iGctpHY7Kxr4Fg9Xv1YuLmVZHzfQg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777655211; c=relaxed/simple; bh=4imj/IMIMrx39ICad1g98Rh7aEv+9l7I2apVSPKjhBw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=dW+ejlDPpD7OMec6dkM9iyP+bH8naOTS6BC8cw3M5cUlfATKVkwc/DDI73tNh6P0tir08PbO4pS1ZNTZaJKtDOFgQT1RcYZXN5xsmp/Yoe+GIbjzkiQUlJSxfX/SECUfzHsmOZKTpbz9IUaXSVfJJUPK0uwARizmAFm6hXFRi+w= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=znFlC6Z1; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="znFlC6Z1" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=bZzzOxdjkmfCxqp8bZuNqOw9QLZECcXjlZTbJ9BtGjs=; b=znFlC6Z1LbaPEB8hdbXzJvnLmX ZBb5bVF2HsqCqy7NL8xzUAScLF3GtUTr2nfELsGPhw5RG6eMWlshgtivDVmVnuBJG1PPwK2X/OEFw 7Pwq/+yrfBQMddetIGMjgb6xDlSbYL5+c3pO1lHwmCZw38A89SyejKB1b5Jl0htXaRDk=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1wIrJf-000qaI-Mk; Fri, 01 May 2026 19:06:15 +0200 Date: Fri, 1 May 2026 19:06:15 +0200 From: Andrew Lunn To: Alex Elder Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, maxime.chevallier@bootlin.com, rmk+kernel@armlinux.org.uk, andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linusw@kernel.org, brgl@kernel.org, arnd@arndb.de, gregkh@linuxfoundation.org, Daniel Thompson , mohd.anwar@oss.qualcomm.com, a0987203069@gmail.com, alexandre.torgue@foss.st.com, ast@kernel.org, boon.khai.ng@altera.com, chenchuangyu@xiaomi.com, chenhuacai@kernel.org, daniel@iogearbox.net, hawk@kernel.org, hkallweit1@gmail.com, inochiama@gmail.com, john.fastabend@gmail.com, julianbraha@gmail.com, livelycarpet87@gmail.com, matthew.gerlach@altera.com, mcoquelin.stm32@gmail.com, me@ziyao.cc, prabhakar.mahadev-lad.rj@bp.renesas.com, richardcochran@gmail.com, rohan.g.thomas@altera.com, sdf@fomichev.me, siyanteng@cqsoftware.com.cn, weishangjuan@eswincomputing.com, wens@kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 03/12] net: pcs: pcs-xpcs: Preserve BMCR_ANENBLE during link up Message-ID: <91332fc1-11ed-444e-a211-699420cf0108@lunn.ch> References: <20260501155421.3329862-1-elder@riscstar.com> <20260501155421.3329862-4-elder@riscstar.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260501155421.3329862-4-elder@riscstar.com> On Fri, May 01, 2026 at 10:54:11AM -0500, Alex Elder wrote: > From: Daniel Thompson > > Currently the XCPS found on Toshiba TC9564 (a.k.a. Qualcomm QPS615) > is unable to operate at 1000base-X and slower with a PHY connected > using SGMII/2500base-X (in our case a Qualcomm QCA8081). The link > negotiates speed correctly but the MAC can't get any packets out. We need to break this down into its components. I assume you are saying the PHY negotiates the media speed with the link partner. That is PHY talking to PHY. But we also have the PCS talking to the PHY. There can be inband signalling here, for SGMII and 2500BaseX. But not for over clocked SGMII, which is how some vendors implement 2500BaseX. SGMII signalling does not work when overclocked to 2.5G. > This attracted attention to the ANENABLE bit and we observed that the > bit is currently set during config and cleared during link up. Here we are talking about the PCS ANEBNABLE, not the PHY ANEBNABLE. So this is negotiation between the PCS and the PHY. > Preserving the bit during link up allows the system to work as expected. > int ret; > > if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) > return; Think about this. > ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_BMCR, > - mii_bmcr_encode_fixed(speed, duplex)); > + mii_bmcr_encode_fixed(speed, duplex) | an_enable); And mii_bmcr_encode_fixed(). Andrew