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From: Cosmin Ratiu <cratiu@nvidia.com>
To: "andrew+netdev@lunn.ch" <andrew+netdev@lunn.ch>,
	"edumazet@google.com" <edumazet@google.com>,
	"davem@davemloft.net" <davem@davemloft.net>,
	Tariq Toukan <tariqt@nvidia.com>,
	Rahul Rameshbabu <rrameshbabu@nvidia.com>,
	Raed Salem <raeds@nvidia.com>, Mark Bloch <mbloch@nvidia.com>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"pabeni@redhat.com" <pabeni@redhat.com>,
	"leon@kernel.org" <leon@kernel.org>,
	Saeed Mahameed <saeedm@nvidia.com>,
	Boris Pismenny <borisp@nvidia.com>,
	"daniel.zahka@gmail.com" <daniel.zahka@gmail.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linux-rdma@vger.kernel.org" <linux-rdma@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] net/mlx5e: don't assume psp tx skbs are ipv6 csum handling
Date: Tue, 27 Jan 2026 13:17:15 +0000	[thread overview]
Message-ID: <96eec14b49c9bcbccb00619f66abe5a86df3982f.camel@nvidia.com> (raw)
In-Reply-To: <20260126-dzahka-fix-tx-csum-partial-v2-1-0a905590ea5f@gmail.com>

On Mon, 2026-01-26 at 11:38 -0800, Daniel Zahka wrote:
> mlx5e_psp_handle_tx_skb() assumes skbs are ipv6 when doing a partial
> TCP checksum with tso. Make correctly mlx5e_psp_handle_tx_skb()
> handle
> ipv4 packets.
> 
> Fixes: e5a1861a298e ("net/mlx5e: Implement PSP Tx data path")
> Signed-off-by: Daniel Zahka <daniel.zahka@gmail.com>
> ---
> This is a bug when an ipv4 tx skb passes through
> mlx5e_psp_handle_tx_skb() and tso is requested. It was previously
> undetected in my testing because my setup involves cx7's on both
> ends,
> and mlx5e_handle_csum() marks PSP rx skb's with csum_unnecessary.
> 
> To reproduce the problem just turn off NETIF_F_RXCSUM and observe:
> nstat -a | grep TcpInCsumErrors
> ---
> Changes in v2:
> - move declarations down into branches where they are used.
> - Link to v1:
> https://lore.kernel.org/r/20260123-dzahka-fix-tx-csum-partial-v1-1-7b0107693883@gmail.com
> ---
>  .../net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c | 17
> +++++++++++------
>  1 file changed, 11 insertions(+), 6 deletions(-)
> 
> diff --git
> a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c
> b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c
> index c17ea0fcd8ef..ef7f5338540f 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c
> @@ -177,8 +177,6 @@ bool mlx5e_psp_handle_tx_skb(struct net_device
> *netdev,
>  {
>  	struct mlx5e_priv *priv = netdev_priv(netdev);
>  	struct net *net = sock_net(skb->sk);
> -	const struct ipv6hdr *ip6;
> -	struct tcphdr *th;
>  
>  	if (!mlx5e_psp_set_state(priv, skb, psp_st))
>  		return true;
> @@ -190,11 +188,18 @@ bool mlx5e_psp_handle_tx_skb(struct net_device
> *netdev,
>  		return false;
>  	}
>  	if (skb_is_gso(skb)) {
> -		ip6 = ipv6_hdr(skb);
> -		th = inner_tcp_hdr(skb);
> +		int len = skb_shinfo(skb)->gso_size +
> inner_tcp_hdrlen(skb);
> +		struct tcphdr *th = inner_tcp_hdr(skb);
>  
> -		th->check = ~tcp_v6_check(skb_shinfo(skb)->gso_size
> + inner_tcp_hdrlen(skb), &ip6->saddr,
> -					  &ip6->daddr, 0);
> +		if (skb->protocol == htons(ETH_P_IP)) {
> +			const struct iphdr *ip = ip_hdr(skb);
> +
> +			th->check = ~tcp_v4_check(len, ip->saddr,
> ip->daddr, 0);
> +		} else {
> +			const struct ipv6hdr *ip6 = ipv6_hdr(skb);
> +
> +			th->check = ~tcp_v6_check(len, &ip6->saddr,
> &ip6->daddr, 0);
> +		}
>  	}
>  
>  	return true;
> 
> ---
> base-commit: 709bbb015538dfd5c97308b77c950d41a4d95cd3
> change-id: 20260122-dzahka-fix-tx-csum-partial-952e8dc28375
> 
> Best regards,

Reviewed-by: Cosmin Ratiu <cratiu@nvidia.com>

  parent reply	other threads:[~2026-01-27 13:17 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-26 19:38 [PATCH v2] net/mlx5e: don't assume psp tx skbs are ipv6 csum handling Daniel Zahka
2026-01-27 12:56 ` Eric Dumazet
2026-01-27 13:17 ` Cosmin Ratiu [this message]
2026-01-29  4:10 ` patchwork-bot+netdevbpf

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