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From: "Nazle Asmade, Muhammad Nazim Amirul" <muhammad.nazim.amirul.nazle.asmade@altera.com>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Andrew Lunn <andrew@lunn.ch>
Cc: "dinguyen@kernel.org" <dinguyen@kernel.org>,
	"rmk+kernel@armlinux.org.uk" <rmk+kernel@armlinux.org.uk>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"robh@kernel.org" <robh@kernel.org>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"edumazet@google.com" <edumazet@google.com>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"pabeni@redhat.com" <pabeni@redhat.com>,
	"andrew+netdev@lunn.ch" <andrew+netdev@lunn.ch>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] net: stmmac: dwmac-socfpga: Add mac-mode DT property support
Date: Wed, 1 Jul 2026 01:32:34 +0000	[thread overview]
Message-ID: <99923ec2-a973-491a-9a7b-12a54b7d216a@altera.com> (raw)
In-Reply-To: <e691298f-b3e5-4c1a-8270-a821c1f46a2b@bootlin.com>

On 30/6/2026 11:42 pm, Maxime Chevallier wrote:
> 
> 
> On 6/30/26 17:13, Nazle Asmade, Muhammad Nazim Amirul wrote:
> 
>> Yes, Agilex5 has the same concept. The GMII-to-RGMII converter is a
>> Quartus soft IP instantiated in the FPGA fabric — equivalent to the
>> CycloneV EMAC splitter. The XGMAC outputs GMII signals to the FPGA
>> fabric, the soft IP converts them to RGMII, and the RGMII signals then
>> go through the FPGA HVIO pins to the external Marvell 88E1512 PHY.
> 
> Does this converter need any special config, and does it expose any
> control registers ? or is it fully autonomous ?
> 
> If it's fully autonomous, can you detect its presence through some
> capability registers or something like that ?
> 
> 
> Maxime
> 
Hi Maxime,

Per my knowledge, the converter is fully autonomous with no control 
registers and no software configuration required.

Speed switching is handled entirely in hardware — the XGMAC's mac_speed 
output signals are wired directly in the FPGA fabric to the converter's 
speed input. No driver intervention is needed on speed changes.

There are no capability registers and no way to detect its presence in 
hardware. It is a property of the FPGA design, not the HPS silicon.

BR,
Nazim Amirul

  reply	other threads:[~2026-07-01  1:32 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-30 13:31 [PATCH 0/3] arm64: dts/net: stmmac: Add Agilex5 SoCDK TSN Config2 board support muhammad.nazim.amirul.nazle.asmade
2026-06-30 13:31 ` [PATCH 1/3] dt-bindings: arm: altera: Add Agilex5 SoCDK TSN Config2 board board muhammad.nazim.amirul.nazle.asmade
2026-06-30 13:31 ` [PATCH 2/3] arm64: dts: socfpga: agilex5: Add SoCDK TSN Config2 board muhammad.nazim.amirul.nazle.asmade
2026-06-30 13:58   ` Andrew Lunn
2026-06-30 14:39     ` Nazle Asmade, Muhammad Nazim Amirul
2026-06-30 15:25       ` Andrew Lunn
2026-07-01  1:54         ` Nazle Asmade, Muhammad Nazim Amirul
2026-07-01 12:47           ` Andrew Lunn
2026-06-30 13:31 ` [PATCH 3/3] net: stmmac: dwmac-socfpga: Add mac-mode DT property support muhammad.nazim.amirul.nazle.asmade
2026-06-30 14:02   ` Andrew Lunn
2026-06-30 14:04     ` Maxime Chevallier
2026-06-30 15:13       ` Nazle Asmade, Muhammad Nazim Amirul
2026-06-30 15:42         ` Maxime Chevallier
2026-07-01  1:32           ` Nazle Asmade, Muhammad Nazim Amirul [this message]
2026-07-01  6:49   ` Maxime Chevallier
2026-07-01 14:43   ` Andrew Lunn
2026-06-30 13:53 ` [PATCH 0/3] arm64: dts/net: stmmac: Add Agilex5 SoCDK TSN Config2 board support Maxime Chevallier
2026-07-01  2:09   ` Nazle Asmade, Muhammad Nazim Amirul

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