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[46.193.119.166]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4909d68980csm265739915e9.1.2026.06.01.03.40.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 01 Jun 2026 03:40:38 -0700 (PDT) Message-ID: <9c28fb8e-da52-40b3-8dd3-c0bd06ac3434@gmail.com> Date: Mon, 1 Jun 2026 12:40:37 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v7 1/3] net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata To: Nicolai Buchwitz Cc: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Marek Vasut , Maxime Chevallier , Simon Horman , Heiner Kallweit , Russell King , Tristram Ha , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Fidelio Lawson References: <20260524-ksz87xx_errata_low_loss_connections-v7-0-1cd49cfa24f0@exotec.com> <20260524-ksz87xx_errata_low_loss_connections-v7-1-1cd49cfa24f0@exotec.com> Content-Language: en-US From: Fidelio LAWSON In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Nicolai, Thanks again for the detailed testing and feedback. On 5/28/26 13:43, Nicolai Buchwitz wrote: > > The cached state lives on struct ksz_device, but ksz8_r_phy() is > invoked per port. Setting the preset on one port is reported back as > active on the others: > >   phytool write swp1/1/0x1a 1 >   phytool read  swp1/2/0x1a -> 0x0001 >   phytool read  swp1/3/0x1a -> 0x0001 > > The commit message already notes that the erratum applies switch-wide. > So writes from non-primary ports could either be rejected or at least > produce > a dev_info_once() so userspace can see the setting is shared? > I will add a dev_info_once() to inform userspace that the configuration is shared across all ports. > > dev->eq_init starts at zero from the kzalloc, but the header added by > this patch defines KSZ87XX_DSP_EQ_INIT_FACTORY = 0x0F as the hardware > default. After a fresh boot on my setup (no writes), the read returns 0: > >   phytool read swp1/1/0x1c -> 0x0000 > > Should probe set dev->eq_init = KSZ87XX_DSP_EQ_INIT_FACTORY (and > dev->lpf_bw = KSZ87XX_PHY_LPF_90MHZ), or read the indirect registers > once on probe, so the cache reflects what the hardware actually holds? > Good point, I will fix this by setting dev->eq_init = KSZ87XX_DSP_EQ_INIT_FACTORY and dev->lpf_bw = KSZ87XX_PHY_LPF_90MHZ during probe. Thanks, Fidelio