From: Sunil Kovvuri <sunil.kovvuri@gmail.com>
To: Maciej Fijalkowski <maciej.fijalkowski@intel.com>
Cc: Linux Netdev List <netdev@vger.kernel.org>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kubakici@wp.pl>,
Michal Kubecek <mkubecek@suse.cz>,
Sunil Goutham <sgoutham@marvell.com>,
Geetha sowjanya <gakula@marvell.com>,
Christina Jacob <cjacob@marvell.com>,
Subbaraya Sundeep <sbhatta@marvell.com>,
Aleksey Makarov <amakarov@marvell.com>
Subject: Re: [PATCH v4 02/17] octeontx2-pf: Mailbox communication with AF
Date: Fri, 24 Jan 2020 22:45:58 +0530 [thread overview]
Message-ID: <CA+sq2CeT-FrV8Yd=fjZ-rOE87qB7k2HSutzF0L2d2jL1YjnPyA@mail.gmail.com> (raw)
In-Reply-To: <20200124083315.GC32191@ranger.igk.intel.com>
On Fri, Jan 24, 2020 at 9:11 PM Maciej Fijalkowski
<maciej.fijalkowski@intel.com> wrote:
>
> On Tue, Jan 21, 2020 at 06:51:36PM +0530, sunil.kovvuri@gmail.com wrote:
> > From: Sunil Goutham <sgoutham@marvell.com>
> >
> > +
> > +static void otx2_queue_work(struct mbox *mw, struct workqueue_struct *mbox_wq,
> > + int first, int mdevs, u64 intr, int type)
> > +{
> > + struct otx2_mbox_dev *mdev;
> > + struct otx2_mbox *mbox;
> > + struct mbox_hdr *hdr;
> > + int i;
> > +
> > + for (i = first; i < mdevs; i++) {
> > + /* start from 0 */
> > + if (!(intr & BIT_ULL(i - first)))
> > + continue;
> > +
> > + mbox = &mw->mbox;
> > + mdev = &mbox->dev[i];
> > + if (type == TYPE_PFAF)
> > + otx2_sync_mbox_bbuf(mbox, i);
> > + hdr = mdev->mbase + mbox->rx_start;
> > + /* The hdr->num_msgs is set to zero immediately in the interrupt
> > + * handler to ensure that it holds a correct value next time
> > + * when the interrupt handler is called.
> > + * pf->mbox.num_msgs holds the data for use in pfaf_mbox_handler
> > + * pf>mbox.up_num_msgs holds the data for use in
> > + * pfaf_mbox_up_handler.
> > + */
> > + if (hdr->num_msgs) {
> > + mw[i].num_msgs = hdr->num_msgs;
> > + hdr->num_msgs = 0;
> > + if (type == TYPE_PFAF)
> > + memset(mbox->hwbase + mbox->rx_start, 0,
> > + ALIGN(sizeof(struct mbox_hdr),
> > + sizeof(u64)));
> > +
> > + queue_work(mbox_wq, &mw[i].mbox_wrk);
> > + }
> > +
> > + mbox = &mw->mbox_up;
>
> You could have a two separate stack variables for these two mboxes instead
> of flipping the single variable on each loop iteration.
>
> > + mdev = &mbox->dev[i];
> > + if (type == TYPE_PFAF)
> > + otx2_sync_mbox_bbuf(mbox, i);
> > + hdr = mdev->mbase + mbox->rx_start;
> > + if (hdr->num_msgs) {
> > + mw[i].up_num_msgs = hdr->num_msgs;
> > + hdr->num_msgs = 0;
> > + if (type == TYPE_PFAF)
> > + memset(mbox->hwbase + mbox->rx_start, 0,
> > + ALIGN(sizeof(struct mbox_hdr),
> > + sizeof(u64)));
> > +
> > + queue_work(mbox_wq, &mw[i].mbox_up_wrk);
> > + }
>
> Does it make sense to pull out the logic above onto separate function?
>
Thanks for the feedback.
I will relook into the logic and see if this can be cleanedup and
submit along with next patchset.
> > + }
> > +}
> > +
> > +static void otx2_pfaf_mbox_destroy(struct otx2_nic *pf)
> > +{
> > + struct mbox *mbox = &pf->mbox;
> > +
> > + if (pf->mbox_wq) {
> > + flush_workqueue(pf->mbox_wq);
> > + destroy_workqueue(pf->mbox_wq);
> > + pf->mbox_wq = NULL;
> > + }
> > +
> > + if (mbox->mbox.hwbase)
> > + iounmap((void __iomem *)mbox->mbox.hwbase);
> > +
> > + otx2_mbox_destroy(&mbox->mbox);
> > + otx2_mbox_destroy(&mbox->mbox_up);
> > +}
> > +
> > +static int otx2_pfaf_mbox_init(struct otx2_nic *pf)
> > +{
> > + struct mbox *mbox = &pf->mbox;
> > + void __iomem *hwbase;
> > + int err;
> > +
> > + mbox->pfvf = pf;
> > + pf->mbox_wq = alloc_workqueue("otx2_pfaf_mailbox",
> > + WQ_UNBOUND | WQ_HIGHPRI |
> > + WQ_MEM_RECLAIM, 1);
> > + if (!pf->mbox_wq)
> > + return -ENOMEM;
> > +
> > + /* Mailbox is a reserved memory (in RAM) region shared between
> > + * admin function (i.e AF) and this PF, shouldn't be mapped as
> > + * device memory to allow unaligned accesses.
> > + */
> > + hwbase = ioremap_wc(pci_resource_start(pf->pdev, PCI_MBOX_BAR_NUM),
> > + pci_resource_len(pf->pdev, PCI_MBOX_BAR_NUM));
> > + if (!hwbase) {
> > + dev_err(pf->dev, "Unable to map PFAF mailbox region\n");
> > + err = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + err = otx2_mbox_init(&mbox->mbox, hwbase, pf->pdev, pf->reg_base,
> > + MBOX_DIR_PFAF, 1);
> > + if (err)
> > + goto exit;
> > +
> > + err = otx2_mbox_init(&mbox->mbox_up, hwbase, pf->pdev, pf->reg_base,
> > + MBOX_DIR_PFAF_UP, 1);
>
> There is a chance that the first otx2_mbox_init succeeded and second one
> failed. In that case you will be leaking the mbox->dev that otx2_mbox_init
> is internally allocating as the caller of otx2_pfaf_mbox_init in case of
> error has a 'goto err_free_irq_vectors', so otx2_mbox_destroy won't be
> called for the mbox->mbox. Furthermore the iounmap() would be skipped as
> well.
>
> I'm not sure whether PCI subsystem will call the remove() callback in case
> when probe() failed?
>
Thanks for catching this, will fix and resubmit.
Sunil.
next prev parent reply other threads:[~2020-01-24 17:16 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-21 13:21 [PATCH v4 00/17] octeontx2-pf: Add network driver for physical function sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 01/17] octeontx2-pf: Add Marvell OcteonTX2 NIC driver sunil.kovvuri
2020-01-21 16:00 ` Jakub Kicinski
2020-01-21 13:21 ` [PATCH v4 02/17] octeontx2-pf: Mailbox communication with AF sunil.kovvuri
2020-01-21 16:00 ` Jakub Kicinski
2020-01-22 19:27 ` Sunil Kovvuri
2020-01-23 14:14 ` Jakub Kicinski
2020-01-24 8:33 ` Maciej Fijalkowski
2020-01-24 17:15 ` Sunil Kovvuri [this message]
2020-01-21 13:21 ` [PATCH v4 03/17] octeontx2-pf: Attach NIX and NPA block LFs sunil.kovvuri
2020-01-21 16:00 ` Jakub Kicinski
2020-01-22 19:27 ` Sunil Kovvuri
2020-01-21 13:21 ` [PATCH v4 04/17] octeontx2-pf: Initialize and config queues sunil.kovvuri
2020-01-21 16:00 ` Jakub Kicinski
2020-01-22 19:29 ` Sunil Kovvuri
2020-01-23 14:20 ` Jakub Kicinski
2020-01-24 11:21 ` Sunil Kovvuri
2020-01-21 13:21 ` [PATCH v4 05/17] octeontx2-pf: Setup interrupts and NAPI handler sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 06/17] octeontx2-pf: Receive packet handling support sunil.kovvuri
2020-01-21 16:33 ` Jakub Kicinski
2020-01-22 19:34 ` Sunil Kovvuri
2020-01-24 10:14 ` Maciej Fijalkowski
2020-01-21 13:21 ` [PATCH v4 07/17] octeontx2-pf: Add packet transmission support sunil.kovvuri
2020-01-21 16:54 ` Jakub Kicinski
2020-01-22 19:50 ` Sunil Kovvuri
2020-01-23 14:24 ` Jakub Kicinski
2020-01-21 13:21 ` [PATCH v4 08/17] octeontx2-pf: Register and handle link notifications sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 09/17] octeontx2-pf: MTU, MAC and RX mode config support sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 10/17] octeontx2-pf: Error handling support sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 11/17] octeontx2-pf: Receive side scaling support sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 12/17] octeontx2-pf: TCP segmentation offload support sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 13/17] octeontx2-pf: Add ndo_get_stats64 sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 14/17] octeontx2-pf: Add basic ethtool support sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 15/17] octeontx2-pf: ethtool RSS config support sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 16/17] Documentation: net: octeontx2: Add RVU HW and drivers overview sunil.kovvuri
2020-01-21 13:21 ` [PATCH v4 17/17] MAINTAINERS: Add entry for Marvell OcteonTX2 Physical Function driver sunil.kovvuri
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