From: Mathias Kresin <openwrt@kresin.me>
To: Alexander Stein <alexander.stein@systec-electronic.com>
Cc: "Mehrtens, Hauke" <hauke.mehrtens@intel.com>,
John Crispin <john@phrozen.org>,
Florian Fainelli <f.fainelli@gmail.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"andrew@lunn.ch" <andrew@lunn.ch>,
Hauke Mehrtens <hauke@hauke-m.de>
Subject: Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver
Date: Mon, 23 May 2016 12:07:31 +0200 [thread overview]
Message-ID: <CABwW5n=M3HNxT=5556fRfx4_yup3FwbaLBY5AkDOoa0EPSyK_A@mail.gmail.com> (raw)
In-Reply-To: <8983627.qbi7VGpM7G@ws-stein>
2016-05-23 11:49 GMT+02:00 Alexander Stein
<alexander.stein@systec-electronic.com>:
>> The registers are set to some reset values after the chip is coming out of
>> reset, but we should set them all to the same value, Mathias said that all
>> except for one board he knows are using only one LED per port, but they are
>> often using different LED pins, I will change my patch.
>
> One LED per port? I would think of using one RJ45 socket per port which
> usually have 2 LEDs.
The majority of the CPEs I'm talking about, do not have any leds at
the back side RJ45 socket. They are using a single led at the front
for status indication.
I'm only aware of one CPE that has two LEDs at the RJ45 socket.
Mathias
prev parent reply other threads:[~2016-05-23 10:07 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-18 16:03 [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Alexander Stein
2016-05-18 16:24 ` Florian Fainelli
2016-05-18 17:01 ` Andrew Lunn
2016-05-19 7:05 ` Alexander Stein
2016-05-19 12:15 ` Andrew Lunn
2016-05-19 4:50 ` John Crispin
2016-05-19 6:57 ` Alexander Stein
2016-05-19 7:03 ` John Crispin
2016-05-19 7:28 ` Alexander Stein
2016-05-19 10:03 ` Mathias Kresin
2016-05-19 10:21 ` Alexander Stein
2016-05-23 9:12 ` Mehrtens, Hauke
2016-05-23 9:49 ` Alexander Stein
2016-05-23 10:07 ` Mathias Kresin [this message]
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