* [PATCH net-next] net: bcmgenet: fix Tx ring priority programming
@ 2014-10-07 0:50 Petri Gynther
2014-10-07 3:59 ` David Miller
0 siblings, 1 reply; 3+ messages in thread
From: Petri Gynther @ 2014-10-07 0:50 UTC (permalink / raw)
To: netdev; +Cc: davem, f.fainelli
GENET MAC has three Tx ring priority registers:
- GENET_x_TDMA_PRIORITY0 for queues 0-5
- GENET_x_TDMA_PRIORITY1 for queues 6-11
- GENET_x_TDMA_PRIORITY2 for queues 12-16
Fix bcmgenet_init_multiq() to program them correctly.
Signed-off-by: Petri Gynther <pgynther@google.com>
---
drivers/net/ethernet/broadcom/genet/bcmgenet.c | 46 +++++++++++++++++---------
1 file changed, 30 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
index e0a6238..151d5b2 100644
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
@@ -191,8 +191,9 @@ enum dma_reg {
DMA_STATUS,
DMA_SCB_BURST_SIZE,
DMA_ARB_CTRL,
- DMA_PRIORITY,
- DMA_RING_PRIORITY,
+ DMA_PRIORITY_0,
+ DMA_PRIORITY_1,
+ DMA_PRIORITY_2,
};
static const u8 bcmgenet_dma_regs_v3plus[] = {
@@ -201,8 +202,9 @@ static const u8 bcmgenet_dma_regs_v3plus[] = {
[DMA_STATUS] = 0x08,
[DMA_SCB_BURST_SIZE] = 0x0C,
[DMA_ARB_CTRL] = 0x2C,
- [DMA_PRIORITY] = 0x30,
- [DMA_RING_PRIORITY] = 0x38,
+ [DMA_PRIORITY_0] = 0x30,
+ [DMA_PRIORITY_1] = 0x34,
+ [DMA_PRIORITY_2] = 0x38,
};
static const u8 bcmgenet_dma_regs_v2[] = {
@@ -211,8 +213,9 @@ static const u8 bcmgenet_dma_regs_v2[] = {
[DMA_STATUS] = 0x08,
[DMA_SCB_BURST_SIZE] = 0x0C,
[DMA_ARB_CTRL] = 0x30,
- [DMA_PRIORITY] = 0x34,
- [DMA_RING_PRIORITY] = 0x3C,
+ [DMA_PRIORITY_0] = 0x34,
+ [DMA_PRIORITY_1] = 0x38,
+ [DMA_PRIORITY_2] = 0x3C,
};
static const u8 bcmgenet_dma_regs_v1[] = {
@@ -220,8 +223,9 @@ static const u8 bcmgenet_dma_regs_v1[] = {
[DMA_STATUS] = 0x04,
[DMA_SCB_BURST_SIZE] = 0x0C,
[DMA_ARB_CTRL] = 0x30,
- [DMA_PRIORITY] = 0x34,
- [DMA_RING_PRIORITY] = 0x3C,
+ [DMA_PRIORITY_0] = 0x34,
+ [DMA_PRIORITY_1] = 0x38,
+ [DMA_PRIORITY_2] = 0x3C,
};
/* Set at runtime once bcmgenet version is known */
@@ -1696,7 +1700,8 @@ static void bcmgenet_init_multiq(struct net_device *dev)
{
struct bcmgenet_priv *priv = netdev_priv(dev);
unsigned int i, dma_enable;
- u32 reg, dma_ctrl, ring_cfg = 0, dma_priority = 0;
+ u32 reg, dma_ctrl, ring_cfg = 0;
+ u32 dma_priority[3] = {0, 0, 0};
if (!netif_is_multiqueue(dev)) {
netdev_warn(dev, "called with non multi queue aware HW\n");
@@ -1721,9 +1726,17 @@ static void bcmgenet_init_multiq(struct net_device *dev)
/* Configure ring as descriptor ring and setup priority */
ring_cfg |= 1 << i;
- dma_priority |= ((GENET_Q0_PRIORITY + i) <<
- (GENET_MAX_MQ_CNT + 1) * i);
dma_ctrl |= 1 << (i + DMA_RING_BUF_EN_SHIFT);
+
+ if (i < 6)
+ dma_priority[0] |= ((GENET_Q0_PRIORITY + i) <<
+ (i * DMA_RING_BUF_PRIORITY_SHIFT));
+ else if (i < 12)
+ dma_priority[1] |= ((GENET_Q0_PRIORITY + i) <<
+ ((i - 6) * DMA_RING_BUF_PRIORITY_SHIFT));
+ else
+ dma_priority[2] |= ((GENET_Q0_PRIORITY + i) <<
+ ((i - 12) * DMA_RING_BUF_PRIORITY_SHIFT));
}
/* Enable rings */
@@ -1731,11 +1744,12 @@ static void bcmgenet_init_multiq(struct net_device *dev)
reg |= ring_cfg;
bcmgenet_tdma_writel(priv, reg, DMA_RING_CFG);
- /* Use configured rings priority and set ring #16 priority */
- reg = bcmgenet_tdma_readl(priv, DMA_RING_PRIORITY);
- reg |= ((GENET_Q0_PRIORITY + priv->hw_params->tx_queues) << 20);
- reg |= dma_priority;
- bcmgenet_tdma_writel(priv, reg, DMA_PRIORITY);
+ /* Set ring 16 priority and program the hardware registers */
+ dma_priority[2] |=
+ ((GENET_Q0_PRIORITY + priv->hw_params->tx_queues) << 20);
+ bcmgenet_tdma_writel(priv, dma_priority[0], DMA_PRIORITY_0);
+ bcmgenet_tdma_writel(priv, dma_priority[1], DMA_PRIORITY_1);
+ bcmgenet_tdma_writel(priv, dma_priority[2], DMA_PRIORITY_2);
/* Configure ring as descriptor ring and re-enable DMA if enabled */
reg = bcmgenet_tdma_readl(priv, DMA_CTRL);
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH net-next] net: bcmgenet: fix Tx ring priority programming
2014-10-07 0:50 [PATCH net-next] net: bcmgenet: fix Tx ring priority programming Petri Gynther
@ 2014-10-07 3:59 ` David Miller
2014-10-07 16:09 ` Petri Gynther
0 siblings, 1 reply; 3+ messages in thread
From: David Miller @ 2014-10-07 3:59 UTC (permalink / raw)
To: pgynther; +Cc: netdev, f.fainelli
From: Petri Gynther <pgynther@google.com>
Date: Mon, 6 Oct 2014 17:50:01 -0700 (PDT)
> @@ -1731,11 +1744,12 @@ static void bcmgenet_init_multiq(struct net_device *dev)
> reg |= ring_cfg;
> bcmgenet_tdma_writel(priv, reg, DMA_RING_CFG);
>
> - /* Use configured rings priority and set ring #16 priority */
> - reg = bcmgenet_tdma_readl(priv, DMA_RING_PRIORITY);
> - reg |= ((GENET_Q0_PRIORITY + priv->hw_params->tx_queues) << 20);
> - reg |= dma_priority;
> - bcmgenet_tdma_writel(priv, reg, DMA_PRIORITY);
> + /* Set ring 16 priority and program the hardware registers */
> + dma_priority[2] |=
> + ((GENET_Q0_PRIORITY + priv->hw_params->tx_queues) << 20);
Please use "<< (16 - 12) * DMA_RING_BUF_PRIORITY_SHIFT" otherwise this
constant is magic.
You might, optionally, add macros for the subtraction adjustment each
priority register uses (0, 6, 12, respectively).
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH net-next] net: bcmgenet: fix Tx ring priority programming
2014-10-07 3:59 ` David Miller
@ 2014-10-07 16:09 ` Petri Gynther
0 siblings, 0 replies; 3+ messages in thread
From: Petri Gynther @ 2014-10-07 16:09 UTC (permalink / raw)
To: David Miller; +Cc: netdev, Florian Fainelli
Hi David,
On Mon, Oct 6, 2014 at 8:59 PM, David Miller <davem@davemloft.net> wrote:
> From: Petri Gynther <pgynther@google.com>
> Date: Mon, 6 Oct 2014 17:50:01 -0700 (PDT)
>
>> @@ -1731,11 +1744,12 @@ static void bcmgenet_init_multiq(struct net_device *dev)
>> reg |= ring_cfg;
>> bcmgenet_tdma_writel(priv, reg, DMA_RING_CFG);
>>
>> - /* Use configured rings priority and set ring #16 priority */
>> - reg = bcmgenet_tdma_readl(priv, DMA_RING_PRIORITY);
>> - reg |= ((GENET_Q0_PRIORITY + priv->hw_params->tx_queues) << 20);
>> - reg |= dma_priority;
>> - bcmgenet_tdma_writel(priv, reg, DMA_PRIORITY);
>> + /* Set ring 16 priority and program the hardware registers */
>> + dma_priority[2] |=
>> + ((GENET_Q0_PRIORITY + priv->hw_params->tx_queues) << 20);
>
> Please use "<< (16 - 12) * DMA_RING_BUF_PRIORITY_SHIFT" otherwise this
> constant is magic.
>
> You might, optionally, add macros for the subtraction adjustment each
> priority register uses (0, 6, 12, respectively).
Thanks for the comments. I'm going to simplify this with a few macros.
^ permalink raw reply [flat|nested] 3+ messages in thread
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