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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
To: Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Vivien Didelot <vivien.didelot@gmail.com>,
	Vladimir Oltean <olteanv@gmail.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Claudiu Manoil <claudiu.manoil@nxp.com>,
	George McCollister <george.mccollister@gmail.com>,
	Hauke Mehrtens <hauke@hauke-m.de>,
	Kurt Kanzenbach <kurt@linutronix.de>,
	Vladimir Oltean <vladimir.oltean@nxp.com>,
	Woojung Huh <woojung.huh@microchip.com>
Cc: "David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>,
	netdev@vger.kernel.org, UNGLinuxDriver@microchip.com
Subject: [PATCH RFC net-next 10/12] net: dsa: qca8k: convert to phylink_generic_validate()
Date: Wed, 24 Nov 2021 17:53:14 +0000	[thread overview]
Message-ID: <E1mpwSI-00D8Lt-CB@rmk-PC.armlinux.org.uk> (raw)
In-Reply-To: <YZ56WapOaVpUbRuT@shell.armlinux.org.uk>

Populate the supported interfaces and MAC capabilities for the QCA8K
DSA switch and remove the old validate implementation to allow DSA to
use phylink_generic_validate() for this switch driver.

In making this change, we bring consistency to the ethtool linkmodes
that phylink's validate step produces, thereby following the expected
behaviour as the phylink documentation has explained. Specifically, the
ethtool 1000baseX_Full capability is now permitted for all interface
modes, as it is a property of the PHY driver whether 1000baseX fiber
connections can be supported.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
 drivers/net/dsa/qca8k.c | 66 ++++++++++++-----------------------------
 1 file changed, 19 insertions(+), 47 deletions(-)

diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 6516df08a5d5..a0bdc14997e8 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -1527,67 +1527,39 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
 	}
 }
 
-static void
-qca8k_phylink_validate(struct dsa_switch *ds, int port,
-		       unsigned long *supported,
-		       struct phylink_link_state *state)
+static void qca8k_phylink_get_caps(struct dsa_switch *ds, int port,
+				   struct phylink_config *config)
 {
-	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
-
 	switch (port) {
 	case 0: /* 1st CPU port */
-		if (state->interface != PHY_INTERFACE_MODE_NA &&
-		    state->interface != PHY_INTERFACE_MODE_RGMII &&
-		    state->interface != PHY_INTERFACE_MODE_RGMII_ID &&
-		    state->interface != PHY_INTERFACE_MODE_RGMII_TXID &&
-		    state->interface != PHY_INTERFACE_MODE_RGMII_RXID &&
-		    state->interface != PHY_INTERFACE_MODE_SGMII)
-			goto unsupported;
+		phy_interface_set_rgmii(config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_SGMII,
+			  config->supported_interfaces);
 		break;
+
 	case 1:
 	case 2:
 	case 3:
 	case 4:
 	case 5:
 		/* Internal PHY */
-		if (state->interface != PHY_INTERFACE_MODE_NA &&
-		    state->interface != PHY_INTERFACE_MODE_GMII &&
-		    state->interface != PHY_INTERFACE_MODE_INTERNAL)
-			goto unsupported;
+		__set_bit(PHY_INTERFACE_MODE_GMII,
+			  config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
+			  config->supported_interfaces);
 		break;
+
 	case 6: /* 2nd CPU port / external PHY */
-		if (state->interface != PHY_INTERFACE_MODE_NA &&
-		    state->interface != PHY_INTERFACE_MODE_RGMII &&
-		    state->interface != PHY_INTERFACE_MODE_RGMII_ID &&
-		    state->interface != PHY_INTERFACE_MODE_RGMII_TXID &&
-		    state->interface != PHY_INTERFACE_MODE_RGMII_RXID &&
-		    state->interface != PHY_INTERFACE_MODE_SGMII &&
-		    state->interface != PHY_INTERFACE_MODE_1000BASEX)
-			goto unsupported;
+		phy_interface_set_rgmii(config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_SGMII,
+			  config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_1000BASEX,
+			  config->supported_interfaces);
 		break;
-	default:
-unsupported:
-		linkmode_zero(supported);
-		return;
 	}
 
-	phylink_set_port_modes(mask);
-	phylink_set(mask, Autoneg);
-
-	phylink_set(mask, 1000baseT_Full);
-	phylink_set(mask, 10baseT_Half);
-	phylink_set(mask, 10baseT_Full);
-	phylink_set(mask, 100baseT_Half);
-	phylink_set(mask, 100baseT_Full);
-
-	if (state->interface == PHY_INTERFACE_MODE_1000BASEX)
-		phylink_set(mask, 1000baseX_Full);
-
-	phylink_set(mask, Pause);
-	phylink_set(mask, Asym_Pause);
-
-	linkmode_and(supported, supported, mask);
-	linkmode_and(state->advertising, state->advertising, mask);
+	config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
+		MAC_10 | MAC_100 | MAC_1000FD;
 }
 
 static int
@@ -2405,7 +2377,7 @@ static const struct dsa_switch_ops qca8k_switch_ops = {
 	.port_vlan_filtering	= qca8k_port_vlan_filtering,
 	.port_vlan_add		= qca8k_port_vlan_add,
 	.port_vlan_del		= qca8k_port_vlan_del,
-	.phylink_validate	= qca8k_phylink_validate,
+	.phylink_get_caps	= qca8k_phylink_get_caps,
 	.phylink_mac_link_state	= qca8k_phylink_mac_link_state,
 	.phylink_mac_config	= qca8k_phylink_mac_config,
 	.phylink_mac_link_down	= qca8k_phylink_mac_link_down,
-- 
2.30.2


  parent reply	other threads:[~2021-11-24 17:53 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-24 17:46 [PATCH RFC net-next 00/12] Allow DSA drivers to set all phylink capabilities Russell King (Oracle)
2021-11-24 17:52 ` [PATCH RFC net-next 01/12] net: dsa: consolidate phylink creation Russell King (Oracle)
2021-11-24 18:11   ` Vladimir Oltean
2021-11-24 23:25     ` Russell King (Oracle)
2021-11-24 17:52 ` [PATCH RFC net-next 02/12] net: dsa: support use of phylink_generic_validate() Russell King (Oracle)
2021-11-24 18:13   ` Vladimir Oltean
2021-11-24 17:52 ` [PATCH RFC net-next 03/12] net: dsa: replace phylink_get_interfaces() with phylink_get_caps() Russell King (Oracle)
2021-11-24 18:15   ` Vladimir Oltean
2021-11-24 18:26     ` Russell King (Oracle)
2021-11-24 19:10       ` Russell King (Oracle)
2021-11-24 20:26         ` Vladimir Oltean
2021-11-24 20:56           ` Russell King (Oracle)
2021-11-24 21:18             ` Vladimir Oltean
2021-11-24 17:52 ` [PATCH RFC net-next 04/12] net: dsa: ar9331: convert to phylink_generic_validate() Russell King (Oracle)
2021-11-24 17:52 ` [PATCH RFC net-next 05/12] net: dsa: bcm_sf2: " Russell King (Oracle)
2021-12-03 20:03   ` Florian Fainelli
2021-12-04  4:18     ` Florian Fainelli
2021-12-04  8:59       ` Russell King (Oracle)
2021-12-04 14:42         ` Russell King (Oracle)
2021-12-04 14:52         ` Russell King (Oracle)
2021-12-04 15:01           ` Andrew Lunn
2021-12-05 12:58             ` Russell King (Oracle)
2021-12-06 15:59           ` Tom Lendacky
2021-12-06 16:13             ` Russell King (Oracle)
2021-12-06 16:36               ` Tom Lendacky
2021-12-06 16:39                 ` Russell King (Oracle)
2021-12-06 17:06           ` Florian Fainelli
2021-12-06 19:26             ` Russell King (Oracle)
2021-12-07 18:08               ` Russell King (Oracle)
2021-11-24 17:52 ` [PATCH RFC net-next 06/12] net: dsa: hellcreek: " Russell King (Oracle)
2021-11-25  8:49   ` Kurt Kanzenbach
2021-11-24 17:52 ` [PATCH RFC net-next 07/12] net: dsa: ksz8795: " Russell King (Oracle)
2021-11-24 17:53 ` [PATCH RFC net-next 08/12] net: dsa: lantiq: " Russell King (Oracle)
2021-11-28 18:49   ` Hauke Mehrtens
2021-11-24 17:53 ` [PATCH RFC net-next 09/12] net: dsa: ocelot: " Russell King (Oracle)
2021-11-24 20:07   ` Vladimir Oltean
2021-11-24 21:21     ` Russell King (Oracle)
2021-11-24 17:53 ` Russell King (Oracle) [this message]
2021-11-24 17:53 ` [PATCH RFC net-next 11/12] net: dsa: sja1105: " Russell King (Oracle)
2021-11-24 19:53   ` Vladimir Oltean
2021-11-24 21:08     ` Russell King (Oracle)
2021-11-24 22:34       ` Vladimir Oltean
2021-11-24 23:21         ` Russell King (Oracle)
2021-11-24 23:32           ` Vladimir Oltean
2021-11-25 12:56             ` Russell King (Oracle)
2021-11-25 16:18               ` Vladimir Oltean
2021-11-24 17:53 ` [PATCH RFC net-next 12/12] net: dsa: xrs700x: " Russell King (Oracle)
2021-12-03 16:15 ` [PATCH RFC net-next 00/12] Allow DSA drivers to set all phylink capabilities Russell King (Oracle)
2021-12-03 19:28   ` Florian Fainelli
2021-12-03 19:44     ` Florian Fainelli

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