From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59721336ED1; Mon, 19 Jan 2026 12:43:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768826582; cv=none; b=L/KsITToTmoT7jtxUB9LCEBFDhTP1o99W4eOcx6BZh8rIkE/6F2vr6HcxXSqqAt1T9nxMR12SLV6kLH85LsAfeKqI5Pp5+qApziuG2izBxQi1ytnisAeOnvvc1FgjsCgkp49dciVv2Ps7bDCtIW4UW/DHAEfKkOWkPbjsVJB+IU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768826582; c=relaxed/simple; bh=6UY4/kAHc77mZt29tu275ruR1bXZ+prCDzJMWFxN+NI=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=Y6JFePXCtsqR0VDjp3skA/xl/8DBfj5p9SOZ79Ei62t0XQs/icyBthlA7U6vbARD/YcRsqkOHWR+qi+SO8EwlUMUhQW20GXBh/iHhZQiS1pMUvDNW241LELquNRqg6QHxpf3ADZprBfvf99DouYx6xkl7ypIOoXsKkI+CST9q0g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=UYG/lmV1; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="UYG/lmV1" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=mK8mJQDq3soA7fuQ070nblaAuN2T/Q7fA2/a4P0BsAY=; b=UYG/lmV1PZrKylTKiFad3102Mb VDcshyhHP94TPNBBk9NtVamxjfaafHRQ12yAsPJ9VRdACuHG80qEQ1TYyDBU9ASKWrkTLlgosYI1R 2btmSk7NVViUGlR2r7+MPMsAfRvJ74eaHyiPOp2s6OrwpnNOyqJx0rVk+VgKDN7hT95IzfMTNX4Je pGJUGRU8JshEUYXVIHYME2NQhvD6bQ8HmVyyUNubJXdQrFPJa7lP7g+yn5JieFQh4iWUfzHP3Zwve w8NfADrNiDOSRqnxsRb+thzMJIEGQYtdg5OsJsTLfxadhYerQ57wFCaxmThEm5R91X7fqOj8Jo4Bc 1+vN+coA==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:36886 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vhoSw-0000000054n-2p37; Mon, 19 Jan 2026 12:34:42 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.98.2) (envelope-from ) id 1vhoSr-00000005H2N-2H2L; Mon, 19 Jan 2026 12:34:37 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Torgue , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Maxime Chevallier , Maxime Coquelin , Mohd Ayaan Anwar , Neil Armstrong , netdev@vger.kernel.org, Paolo Abeni , Vinod Koul Subject: [PATCH net-next 12/14] net: stmmac: add support for reading inband SGMII status Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" Message-Id: Sender: Russell King Date: Mon, 19 Jan 2026 12:34:37 +0000 Report the link, speed and duplex for SGMII links, read from the SGMII, RGMII and SMII status and control register. Signed-off-by: Russell King (Oracle) --- rfc->v1: fix setting SGMII's link status - depend on both link status. --- .../net/ethernet/stmicro/stmmac/stmmac_pcs.c | 46 ++++++++++++++++++- .../net/ethernet/stmicro/stmmac/stmmac_pcs.h | 4 ++ 2 files changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c index 73fc56ce5e55..9dd7e78cfbc4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c @@ -17,6 +17,16 @@ #define GMAC_ANE_LPA 0x0c /* ANE link partener ability */ #define GMAC_TBI 0x14 /* TBI extend status */ +/* + * RGSMII status bitfield definitions. + */ +#define GMAC_RGSMIII_LNKMOD BIT(0) +#define GMAC_RGSMIII_SPEED_MASK GENMASK(2, 1) +#define GMAC_RGSMIII_SPEED_125 2 +#define GMAC_RGSMIII_SPEED_25 1 +#define GMAC_RGSMIII_SPEED_2_5 0 +#define GMAC_RGSMIII_LNKSTS BIT(3) + static enum ethtool_link_mode_bit_indices dwmac_hd_mode_bits[] = { ETHTOOL_LINK_MODE_10baseT_Half_BIT, ETHTOOL_LINK_MODE_100baseT_Half_BIT, @@ -97,7 +107,7 @@ static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state) { struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs); - u32 status, lpa; + u32 status, lpa, rgsmii; status = readl(spcs->base + GMAC_AN_STATUS); @@ -111,7 +121,37 @@ static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs, phylink_mii_c22_pcs_decode_state(state, neg_mode, status, lpa); } else { - state->link = false; + rgsmii = field_get(spcs->rgsmii_status_mask, + readl(spcs->rgsmii)); + + state->link = status & BMSR_LSTATUS && + rgsmii & GMAC_RGSMIII_LNKSTS; + + if (state->link && neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { + /* FIXME: fill in speed and duplex. This requires the + * contents of the dwmac1000 GMAC_RGSMIIIS or dwmac4 + * GMAC_PHYIF_CONTROL_STATUS register. + */ + state->duplex = rgsmii & GMAC_RGSMIII_LNKMOD ? + DUPLEX_FULL : DUPLEX_HALF; + switch (FIELD_GET(GMAC_RGSMIII_SPEED_MASK, rgsmii)) { + case GMAC_RGSMIII_SPEED_2_5: + state->speed = SPEED_10; + break; + + case GMAC_RGSMIII_SPEED_25: + state->speed = SPEED_100; + break; + + case GMAC_RGSMIII_SPEED_125: + state->speed = SPEED_1000; + break; + + default: + state->link = false; + break; + } + } } } @@ -205,6 +245,8 @@ int stmmac_integrated_pcs_init(struct stmmac_priv *priv, spcs->priv = priv; spcs->base = priv->ioaddr + pcs_info->pcs_offset; + spcs->rgsmii = priv->ioaddr + pcs_info->rgsmii_offset; + spcs->rgsmii_status_mask = pcs_info->rgsmii_status_mask; spcs->int_mask = pcs_info->int_mask; spcs->pcs.ops = &dwmac_integrated_pcs_ops; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h index a7c71f40f952..f9e7a7ed840b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h @@ -29,12 +29,16 @@ struct stmmac_priv; struct stmmac_pcs_info { unsigned int pcs_offset; + unsigned int rgsmii_offset; + u32 rgsmii_status_mask; u32 int_mask; }; struct stmmac_pcs { struct stmmac_priv *priv; void __iomem *base; + void __iomem *rgsmii; + u32 rgsmii_status_mask; u32 int_mask; phy_interface_t interface; struct phylink_pcs pcs; -- 2.47.3