From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Heiko Stuebner <heiko@sntech.de>,
Jakub Kicinski <kuba@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org,
Paolo Abeni <pabeni@redhat.com>
Subject: [PATCH net-next 08/21] net: stmmac: rk: move speed GRF register offset to private data
Date: Fri, 23 Jan 2026 11:00:58 +0000 [thread overview]
Message-ID: <E1vjEuQ-00000005ggK-2PCE@rmk-PC.armlinux.org.uk> (raw)
In-Reply-To: <aXNUlVZilT-CTgph@shell.armlinux.org.uk>
Move the speed/clocking related GRF register offset into the driver
private data, convert rk_set_reg_speed() to use it and initialise this
member either from the corresponding member in struct rk_gmac_ops, or
the SoC specific initialisation function.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
.../net/ethernet/stmicro/stmmac/dwmac-rk.c | 114 +++++++++++++-----
1 file changed, 81 insertions(+), 33 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 48fc5b58092f..246a7b9205a5 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -50,6 +50,8 @@ struct rk_gmac_ops {
u16 gmac_phy_intf_sel_mask;
u16 gmac_rmii_mode_mask;
+ u16 clock_grf_reg;
+
bool php_grf_required;
bool regs_valid;
u32 regs[];
@@ -99,6 +101,8 @@ struct rk_priv_data {
u16 gmac_grf_reg;
u16 gmac_phy_intf_sel_mask;
u16 gmac_rmii_mode_mask;
+
+ u16 clock_grf_reg;
};
#define GMAC_CLK_DIV1_125M 0
@@ -126,10 +130,14 @@ static u32 rk_encode_wm16(u16 val, u16 mask)
return reg_val;
}
+static int rk_write_clock_grf_reg(struct rk_priv_data *bsp_priv, u32 val)
+{
+ return regmap_write(bsp_priv->grf, bsp_priv->clock_grf_reg, val);
+}
+
static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
const struct rk_reg_speed_data *rsd,
- unsigned int reg, phy_interface_t interface,
- int speed)
+ phy_interface_t interface, int speed)
{
unsigned int val;
@@ -165,7 +173,7 @@ static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
return -EINVAL;
}
- regmap_write(bsp_priv->grf, reg, val);
+ rk_write_clock_grf_reg(bsp_priv, val);
return 0;
@@ -360,7 +368,7 @@ static int rk3128_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3128_reg_speed_data,
- RK3128_GRF_MAC_CON1, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3128_ops = {
@@ -371,6 +379,8 @@ static const struct rk_gmac_ops rk3128_ops = {
.gmac_grf_reg = RK3128_GRF_MAC_CON1,
.gmac_phy_intf_sel_mask = GENMASK_U16(8, 6),
.gmac_rmii_mode_mask = BIT_U16(14),
+
+ .clock_grf_reg = RK3128_GRF_MAC_CON1,
};
#define RK3228_GRF_MAC_CON0 0x0900
@@ -427,7 +437,7 @@ static int rk3228_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3228_reg_speed_data,
- RK3228_GRF_MAC_CON1, interface, speed);
+ interface, speed);
}
static void rk3228_integrated_phy_powerup(struct rk_priv_data *priv)
@@ -449,6 +459,7 @@ static const struct rk_gmac_ops rk3228_ops = {
.gmac_phy_intf_sel_mask = GENMASK_U16(6, 4),
.gmac_rmii_mode_mask = BIT_U16(10),
+ .clock_grf_reg = RK3228_GRF_MAC_CON1,
};
#define RK3288_GRF_SOC_CON1 0x0248
@@ -496,7 +507,7 @@ static int rk3288_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3288_reg_speed_data,
- RK3288_GRF_SOC_CON1, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3288_ops = {
@@ -507,6 +518,8 @@ static const struct rk_gmac_ops rk3288_ops = {
.gmac_grf_reg = RK3288_GRF_SOC_CON1,
.gmac_phy_intf_sel_mask = GENMASK_U16(8, 6),
.gmac_rmii_mode_mask = BIT_U16(14),
+
+ .clock_grf_reg = RK3288_GRF_SOC_CON1,
};
#define RK3308_GRF_MAC_CON0 0x04a0
@@ -530,7 +543,7 @@ static int rk3308_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3308_reg_speed_data,
- RK3308_GRF_MAC_CON0, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3308_ops = {
@@ -539,6 +552,8 @@ static const struct rk_gmac_ops rk3308_ops = {
.gmac_grf_reg = RK3308_GRF_MAC_CON0,
.gmac_phy_intf_sel_mask = GENMASK_U16(4, 2),
+
+ .clock_grf_reg = RK3308_GRF_MAC_CON0,
};
#define RK3328_GRF_MAC_CON0 0x0900
@@ -569,10 +584,12 @@ static int rk3328_init(struct rk_priv_data *bsp_priv)
switch (bsp_priv->id) {
case 0: /* gmac2io */
bsp_priv->gmac_grf_reg = RK3328_GRF_MAC_CON1;
+ bsp_priv->clock_grf_reg = RK3328_GRF_MAC_CON1;
return 0;
case 1: /* gmac2phy */
bsp_priv->gmac_grf_reg = RK3328_GRF_MAC_CON2;
+ bsp_priv->clock_grf_reg = RK3328_GRF_MAC_CON2;
return 0;
default:
@@ -607,11 +624,7 @@ static const struct rk_reg_speed_data rk3328_reg_speed_data = {
static int rk3328_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
- unsigned int reg;
-
- reg = bsp_priv->id ? RK3328_GRF_MAC_CON2 : RK3328_GRF_MAC_CON1;
-
- return rk_set_reg_speed(bsp_priv, &rk3328_reg_speed_data, reg,
+ return rk_set_reg_speed(bsp_priv, &rk3328_reg_speed_data,
interface, speed);
}
@@ -687,7 +700,7 @@ static int rk3366_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3366_reg_speed_data,
- RK3366_GRF_SOC_CON6, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3366_ops = {
@@ -698,6 +711,8 @@ static const struct rk_gmac_ops rk3366_ops = {
.gmac_grf_reg = RK3366_GRF_SOC_CON6,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
.gmac_rmii_mode_mask = BIT_U16(6),
+
+ .clock_grf_reg = RK3366_GRF_SOC_CON6,
};
#define RK3368_GRF_SOC_CON15 0x043c
@@ -745,7 +760,7 @@ static int rk3368_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3368_reg_speed_data,
- RK3368_GRF_SOC_CON15, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3368_ops = {
@@ -756,6 +771,8 @@ static const struct rk_gmac_ops rk3368_ops = {
.gmac_grf_reg = RK3368_GRF_SOC_CON15,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
.gmac_rmii_mode_mask = BIT_U16(6),
+
+ .clock_grf_reg = RK3368_GRF_SOC_CON15,
};
#define RK3399_GRF_SOC_CON5 0xc214
@@ -803,7 +820,7 @@ static int rk3399_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3399_reg_speed_data,
- RK3399_GRF_SOC_CON5, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3399_ops = {
@@ -814,6 +831,8 @@ static const struct rk_gmac_ops rk3399_ops = {
.gmac_grf_reg = RK3399_GRF_SOC_CON5,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
.gmac_rmii_mode_mask = BIT_U16(6),
+
+ .clock_grf_reg = RK3399_GRF_SOC_CON5,
};
#define RK3506_GRF_SOC_CON8 0x0020
@@ -830,6 +849,22 @@ static const struct rk_gmac_ops rk3399_ops = {
#define RK3506_GMAC_CLK_RMII_GATE GRF_BIT(2)
#define RK3506_GMAC_CLK_RMII_NOGATE GRF_CLR_BIT(2)
+static int rk3506_init(struct rk_priv_data *bsp_priv)
+{
+ switch (bsp_priv->id) {
+ case 0:
+ bsp_priv->clock_grf_reg = RK3506_GRF_SOC_CON8;
+ return 0;
+
+ case 1:
+ bsp_priv->clock_grf_reg = RK3506_GRF_SOC_CON11;
+ return 0;
+
+ default:
+ return -EINVAL;
+ }
+}
+
static void rk3506_set_to_rmii(struct rk_priv_data *bsp_priv)
{
unsigned int id = bsp_priv->id, offset;
@@ -846,11 +881,8 @@ static const struct rk_reg_speed_data rk3506_reg_speed_data = {
static int rk3506_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
- unsigned int id = bsp_priv->id, offset;
-
- offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
return rk_set_reg_speed(bsp_priv, &rk3506_reg_speed_data,
- offset, interface, speed);
+ interface, speed);
}
static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
@@ -868,6 +900,7 @@ static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
}
static const struct rk_gmac_ops rk3506_ops = {
+ .init = rk3506_init,
.set_to_rmii = rk3506_set_to_rmii,
.set_speed = rk3506_set_speed,
.set_clock_selection = rk3506_set_clock_selection,
@@ -912,6 +945,22 @@ static const struct rk_gmac_ops rk3506_ops = {
#define RK3528_GMAC1_CLK_RMII_GATE GRF_BIT(9)
#define RK3528_GMAC1_CLK_RMII_NOGATE GRF_CLR_BIT(9)
+static int rk3528_init(struct rk_priv_data *bsp_priv)
+{
+ switch (bsp_priv->id) {
+ case 0:
+ bsp_priv->clock_grf_reg = RK3528_VO_GRF_GMAC_CON;
+ return 0;
+
+ case 1:
+ bsp_priv->clock_grf_reg = RK3528_VPU_GRF_GMAC_CON5;
+ return 0;
+
+ default:
+ return -EINVAL;
+ }
+}
+
static void rk3528_set_to_rgmii(struct rk_priv_data *bsp_priv,
int tx_delay, int rx_delay)
{
@@ -954,17 +1003,13 @@ static int rk3528_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
const struct rk_reg_speed_data *rsd;
- unsigned int reg;
- if (bsp_priv->id == 1) {
+ if (bsp_priv->id == 1)
rsd = &rk3528_gmac1_reg_speed_data;
- reg = RK3528_VPU_GRF_GMAC_CON5;
- } else {
+ else
rsd = &rk3528_gmac0_reg_speed_data;
- reg = RK3528_VO_GRF_GMAC_CON;
- }
- return rk_set_reg_speed(bsp_priv, rsd, reg, interface, speed);
+ return rk_set_reg_speed(bsp_priv, rsd, interface, speed);
}
static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv,
@@ -996,6 +1041,7 @@ static void rk3528_integrated_phy_powerdown(struct rk_priv_data *bsp_priv)
}
static const struct rk_gmac_ops rk3528_ops = {
+ .init = rk3528_init,
.set_to_rgmii = rk3528_set_to_rgmii,
.set_to_rmii = rk3528_set_to_rmii,
.set_speed = rk3528_set_speed,
@@ -1116,10 +1162,12 @@ static int rk3576_init(struct rk_priv_data *bsp_priv)
switch (bsp_priv->id) {
case 0:
bsp_priv->gmac_grf_reg = RK3576_GRF_GMAC_CON0;
+ bsp_priv->clock_grf_reg = RK3576_GRF_GMAC_CON0;
return 0;
case 1:
bsp_priv->gmac_grf_reg = RK3576_GRF_GMAC_CON1;
+ bsp_priv->clock_grf_reg = RK3576_GRF_GMAC_CON1;
return 0;
default:
@@ -1165,12 +1213,7 @@ static const struct rk_reg_speed_data rk3578_reg_speed_data = {
static int rk3576_set_gmac_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
- unsigned int offset_con;
-
- offset_con = bsp_priv->id == 1 ? RK3576_GRF_GMAC_CON1 :
- RK3576_GRF_GMAC_CON0;
-
- return rk_set_reg_speed(bsp_priv, &rk3578_reg_speed_data, offset_con,
+ return rk_set_reg_speed(bsp_priv, &rk3578_reg_speed_data,
interface, speed);
}
@@ -1370,7 +1413,7 @@ static int rv1108_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rv1108_reg_speed_data,
- RV1108_GRF_GMAC_CON0, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rv1108_ops = {
@@ -1379,6 +1422,8 @@ static const struct rk_gmac_ops rv1108_ops = {
.gmac_grf_reg = RV1108_GRF_GMAC_CON0,
.gmac_phy_intf_sel_mask = GENMASK_U16(6, 4),
+
+ .clock_grf_reg = RV1108_GRF_GMAC_CON0,
};
#define RV1126_GRF_GMAC_CON0 0X0070
@@ -1661,6 +1706,9 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
bsp_priv->gmac_phy_intf_sel_mask = ops->gmac_phy_intf_sel_mask;
bsp_priv->gmac_rmii_mode_mask = ops->gmac_rmii_mode_mask;
+ /* Set the default clock control register related parameters */
+ bsp_priv->clock_grf_reg = ops->clock_grf_reg;
+
if (ops->init) {
ret = ops->init(bsp_priv);
if (ret) {
--
2.47.3
next prev parent reply other threads:[~2026-01-23 11:01 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-23 10:59 [PATCH net-next 00/21] net: stmmac: rk: simplify per-SoC configuration Russell King (Oracle)
2026-01-23 11:00 ` [PATCH net-next 01/21] net: stmmac: rk: avoid phy_power_on() Russell King (Oracle)
2026-01-23 11:00 ` [PATCH net-next 02/21] net: stmmac: rk: get rid of rk_phy_power_ctl() Russell King (Oracle)
2026-01-23 11:00 ` [PATCH net-next 03/21] net: stmmac: rk: convert rk3328 to use bsp_priv->id Russell King (Oracle)
2026-01-25 22:16 ` [net-next,03/21] " Jakub Kicinski
2026-01-23 11:00 ` [PATCH net-next 04/21] net: stmmac: rk: group MACPHY register offset and fields together Russell King (Oracle)
2026-01-23 11:00 ` [PATCH net-next 05/21] net: stmmac: rk: add GMAC_CLK_xx constants, simplify RGMII definitions Russell King (Oracle)
2026-01-23 11:00 ` [PATCH net-next 06/21] net: stmmac: rk: add SoC specific ->init() method Russell King (Oracle)
2026-01-23 11:00 ` [PATCH net-next 07/21] net: stmmac: rk: convert to mask-based interface mode configuration Russell King (Oracle)
2026-01-25 22:16 ` [net-next,07/21] " Jakub Kicinski
2026-01-23 11:00 ` Russell King (Oracle) [this message]
2026-01-23 11:01 ` [PATCH net-next 09/21] net: stmmac: rk: convert rk3588 to rk_set_reg_speed() Russell King (Oracle)
2026-01-23 11:01 ` [PATCH net-next 10/21] net: stmmac: rk: remove rk3528 RMII clock initialisation Russell King (Oracle)
2026-01-23 11:01 ` [PATCH net-next 11/21] net: stmmac: rk: use rk_encode_wm16() for RGMII clocks Russell King (Oracle)
2026-01-23 11:01 ` [PATCH net-next 12/21] net: stmmac: rk: use rk_encode_wm16() for RMII speed Russell King (Oracle)
2026-01-23 11:01 ` [PATCH net-next 13/21] net: stmmac: rk: use rk_encode_wm16() for RMII clock Russell King (Oracle)
2026-01-23 11:01 ` [PATCH net-next 14/21] net: stmmac: rk: remove need for ->set_speed() method Russell King (Oracle)
2026-01-23 11:01 ` [PATCH net-next 15/21] net: stmmac: rk: convert px30 Russell King (Oracle)
2026-01-23 11:01 ` [PATCH net-next 16/21] net: stmmac: rk: introduce flags indicating support for RGMII/RMII Russell King (Oracle)
2026-01-23 11:01 ` [PATCH net-next 17/21] net: stmmac: rk: replace empty set_to_rmii() with supports_rmii Russell King (Oracle)
2026-01-25 22:16 ` [net-next,17/21] " Jakub Kicinski
2026-01-23 11:01 ` [PATCH net-next 18/21] net: stmmac: rk: rk3328: gmac2phy only supports RMII Russell King (Oracle)
2026-01-25 22:16 ` [net-next,18/21] " Jakub Kicinski
2026-01-25 22:27 ` Russell King (Oracle)
2026-01-25 23:04 ` Jakub Kicinski
2026-01-23 11:01 ` [PATCH net-next 19/21] net: stmmac: rk: rk3528: gmac0 " Russell King (Oracle)
2026-01-25 22:16 ` [net-next,19/21] " Jakub Kicinski
2026-01-23 11:02 ` [PATCH net-next 20/21] net: stmmac: rk: use rk_encode_wm16() for clock selection Russell King (Oracle)
2026-01-25 22:16 ` [net-next,20/21] " Jakub Kicinski
2026-01-23 11:02 ` [PATCH net-next 21/21] net: stmmac: rk: rk3506, rk3528 and kk3588 have rmii_mode in clock register Russell King (Oracle)
2026-01-25 22:16 ` [net-next,21/21] " Jakub Kicinski
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