From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F054C2D193F; Thu, 19 Feb 2026 12:50:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771505449; cv=none; b=T/EDtpP9X7w+vEumbXHuKRm5ROqPvE/+JbxUz+SjROdIC1oAWDjYd7s+5nxL/FvZ1Etpl9/dGpoZyeRSRl/x23sN0khn62wkgiGv/TzGD/k3OE2U7SyOVrLMQTXxIb9WB1Wx5GmucN5HgtmBdc9hz5poDoM6oPJa5u6L7qtXq14= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771505449; c=relaxed/simple; bh=JTm09d/JpdoVh3oflaOOtgK23s4MJNn0fzOrY1NYJYg=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=GUZSdHu4W3uo+kTjWuMP6HsHgkQnmXHQPPEiOCfssBDLjzsIc0/TRiG/IDGH5rRHdEOjrY6JFuQr0PVp9AQfHu0KkXE9l98XIzqZoH6U0A2Urxkrp43kYD8TaX1VOjakRLDhMq8jDGqt3iVqbG0YUR/NT8wjrW4NuhUjUfmVM8I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=ESKzY/Sx; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="ESKzY/Sx" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=RB2N5YBeKWLxz5FkrVnsyiEuGQy3JJP6HUJk3toQkcs=; b=ESKzY/SxuyfEPreelZNo3IbevQ 7vfTJVptrdbJtQff86uZPzQoMkiRVFVhtFzFcfD4sKqdMVzTD0dyAnTqJIzHiOPJ6zDWZnZyjUj0w heLUqyFrE0CVK18CTmV/6U3IhqNDm2z7JYy/HymVuTxW568uwdIlAjPByMrRVGHxPstSm9BlSGKoF lPpKsRFXREyBDIl9KEzOoUYoudHJASDhu4fNCju0Sjo3xxcXCzR7QIeH3nQOel6KcRiua28b4zm/q 4B+2haBEYv2PQsSrLgNNWb6LcTcgtqHItD8GPa76djmwNiJhqWpIIRO5PCLxtlwMozUqWOxd/qnkz YrIB3tpA==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:58256 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vt3UO-000000000rh-0i7r; Thu, 19 Feb 2026 12:50:40 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.98.2) (envelope-from ) id 1vt3UN-0000000A5e8-0sYf; Thu, 19 Feb 2026 12:50:39 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn Cc: Alexandre Torgue , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Mohd Ayaan Anwar , Neil Armstrong , netdev@vger.kernel.org, Paolo Abeni , Vinod Koul Subject: [PATCH RFC net-next+ 3/9] phy: qcom-sgmii-eth: add .set_mode() and .validate() methods Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" Message-Id: Sender: Russell King Date: Thu, 19 Feb 2026 12:50:39 +0000 qcom-sgmii-eth is an Ethernet SerDes supporting only Ethernet mode using SGMII, 1000BASE-X and 2500BASE-X. Add an implementation of the .set_mode() method, which can be used instead of or as well as the .set_speed() method. The Ethernet interface modes mentioned above all have a fixed data rate, so setting the mode is sufficient to fully specify the operating parameters. Add an implementation of the .validate() method, which will be necessary to allow discovery of the SerDes capabilities for platform independent SerDes support in the stmmac network driver. Reviewed-by: Vladimir Oltean Reviewed-by: Bartosz Golaszewski Acked-by: Vinod Koul Signed-off-by: Russell King (Oracle) --- drivers/phy/qualcomm/phy-qcom-sgmii-eth.c | 43 +++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c b/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c index 5b1c82459c12..4ea3dce7719f 100644 --- a/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c +++ b/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -286,6 +287,37 @@ static int qcom_dwmac_sgmii_phy_power_off(struct phy *phy) return 0; } +static int qcom_dwmac_sgmii_phy_speed(enum phy_mode mode, int submode) +{ + if (mode != PHY_MODE_ETHERNET) + return -EINVAL; + + if (submode == PHY_INTERFACE_MODE_SGMII || + submode == PHY_INTERFACE_MODE_1000BASEX) + return SPEED_1000; + + if (submode == PHY_INTERFACE_MODE_2500BASEX) + return SPEED_2500; + + return -EINVAL; +} + +static int qcom_dwmac_sgmii_phy_set_mode(struct phy *phy, enum phy_mode mode, + int submode) +{ + struct qcom_dwmac_sgmii_phy_data *data = phy_get_drvdata(phy); + int speed; + + speed = qcom_dwmac_sgmii_phy_speed(mode, submode); + if (speed < 0) + return speed; + + if (speed != data->speed) + data->speed = speed; + + return qcom_dwmac_sgmii_phy_calibrate(phy); +} + static int qcom_dwmac_sgmii_phy_set_speed(struct phy *phy, int speed) { struct qcom_dwmac_sgmii_phy_data *data = phy_get_drvdata(phy); @@ -296,10 +328,21 @@ static int qcom_dwmac_sgmii_phy_set_speed(struct phy *phy, int speed) return qcom_dwmac_sgmii_phy_calibrate(phy); } +static int qcom_dwmac_sgmii_phy_validate(struct phy *phy, enum phy_mode mode, + int submode, + union phy_configure_opts *opts) +{ + int ret = qcom_dwmac_sgmii_phy_speed(mode, submode); + + return ret < 0 ? ret : 0; +} + static const struct phy_ops qcom_dwmac_sgmii_phy_ops = { .power_on = qcom_dwmac_sgmii_phy_power_on, .power_off = qcom_dwmac_sgmii_phy_power_off, + .set_mode = qcom_dwmac_sgmii_phy_set_mode, .set_speed = qcom_dwmac_sgmii_phy_set_speed, + .validate = qcom_dwmac_sgmii_phy_validate, .calibrate = qcom_dwmac_sgmii_phy_calibrate, .owner = THIS_MODULE, }; -- 2.47.3