From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>,
netdev@vger.kernel.org, Paolo Abeni <pabeni@redhat.com>
Subject: [PATCH net-next 3/8] net: stmmac: add BASE-X support to integrated PCS
Date: Fri, 13 Mar 2026 12:29:06 +0000 [thread overview]
Message-ID: <E1w11da-0000000DEiA-1EtV@rmk-PC.armlinux.org.uk> (raw)
In-Reply-To: <abQC7r38QLhSeadl@shell.armlinux.org.uk>
The integrated PCS supports 802.3z (BASE-X) modes when the Synopsys
IP is coupled with an appropriate SerDes to provide the electrical
interface. The PCS presents a TBI interface to the SerDes for this.
Thus, the BASE-X related registers are only present when TBI mode is
supported.
dwmac-qcom-ethqos added support for using 2.5G with the integrated PCS
by calling dwmac_ctrl_ane() directly.
Add support for the following to the integrated PCS:
- 1000BASE-X protocol unconditionally.
- 2500BASE-X if the coupled SerDes supports 2.5G speed.
- The above without autonegotiation.
- If the PCS supports TBI, then optional BASE-X autonegotiation for each
of the above.
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
.../net/ethernet/stmicro/stmmac/stmmac_pcs.c | 89 ++++++++++++++++++-
.../net/ethernet/stmicro/stmmac/stmmac_pcs.h | 1 +
include/linux/stmmac.h | 1 +
3 files changed, 87 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
index df72f7c5a6a7..5dbb8fd41099 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
@@ -26,6 +26,27 @@
#define GMAC_RGSMII_SPEED_2_5 0
#define GMAC_RGSMII_LNKSTS BIT(3)
+static unsigned int dwmac_integrated_pcs_inband_caps(struct phylink_pcs *pcs,
+ phy_interface_t interface)
+{
+ struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
+ unsigned int ib_caps;
+
+ if (phy_interface_mode_is_8023z(interface)) {
+ ib_caps = LINK_INBAND_DISABLE;
+
+ /* If the PCS supports TBI/RTBI, then BASE-X negotiation is
+ * supported.
+ */
+ if (spcs->support_tbi_rtbi)
+ ib_caps |= LINK_INBAND_ENABLE;
+
+ return ib_caps;
+ }
+
+ return 0;
+}
+
static int dwmac_integrated_pcs_enable(struct phylink_pcs *pcs)
{
struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
@@ -47,12 +68,20 @@ static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs,
struct phylink_link_state *state)
{
struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
- u32 status, rgsmii;
+ u32 status, lpa, rgsmii;
status = readl(spcs->base + GMAC_AN_STATUS);
if (phy_interface_mode_is_8023z(state->interface)) {
- state->link = false;
+ /* For BASE-X modes, the PCS block supports the advertisement
+ * and link partner advertisement registers using standard
+ * 802.3 format. The status register also has the link status
+ * and AN complete bits in the same bit location. This will
+ * only be used when AN is enabled.
+ */
+ lpa = readl(spcs->base + GMAC_ANE_LPA);
+
+ phylink_mii_c22_pcs_decode_state(state, neg_mode, status, lpa);
} else {
rgsmii = field_get(spcs->rgsmii_status_mask,
readl(spcs->rgsmii));
@@ -84,6 +113,21 @@ static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs,
}
}
+static int dwmac_integrated_pcs_config_aneg(struct stmmac_pcs *spcs,
+ phy_interface_t interface,
+ const unsigned long *advertising)
+{
+ bool changed = false;
+ u32 adv;
+
+ adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
+ if (readl(spcs->base + GMAC_ANE_ADV) != adv)
+ changed = true;
+ writel(adv, spcs->base + GMAC_ANE_ADV);
+
+ return changed;
+}
+
static int dwmac_integrated_pcs_config(struct phylink_pcs *pcs,
unsigned int neg_mode,
phy_interface_t interface,
@@ -91,13 +135,28 @@ static int dwmac_integrated_pcs_config(struct phylink_pcs *pcs,
bool permit_pause_to_mac)
{
struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
+ bool changed = false, ane = true;
+
+ /* Only configure the advertisement and allow AN in BASE-X mode if
+ * the core supports TBI/RTBI. AN will be filtered out by via phylink
+ * and the .pcs_inband_caps() method above.
+ */
+ if (phy_interface_mode_is_8023z(interface) &&
+ spcs->support_tbi_rtbi) {
+ ane = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
+
+ changed = dwmac_integrated_pcs_config_aneg(spcs, interface,
+ advertising);
+ }
- dwmac_ctrl_ane(spcs->base, 0, 1, spcs->priv->hw->reverse_sgmii_enable);
+ dwmac_ctrl_ane(spcs->base, 0, ane,
+ spcs->priv->hw->reverse_sgmii_enable);
- return 0;
+ return changed;
}
static const struct phylink_pcs_ops dwmac_integrated_pcs_ops = {
+ .pcs_inband_caps = dwmac_integrated_pcs_inband_caps,
.pcs_enable = dwmac_integrated_pcs_enable,
.pcs_disable = dwmac_integrated_pcs_disable,
.pcs_get_state = dwmac_integrated_pcs_get_state,
@@ -129,9 +188,18 @@ void stmmac_integrated_pcs_irq(struct stmmac_priv *priv, u32 status,
int stmmac_integrated_pcs_get_phy_intf_sel(struct phylink_pcs *pcs,
phy_interface_t interface)
{
+ struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
+
if (interface == PHY_INTERFACE_MODE_SGMII)
return PHY_INTF_SEL_SGMII;
+ if (phy_interface_mode_is_8023z(interface)) {
+ if (spcs->support_tbi_rtbi)
+ return PHY_INTF_SEL_TBI;
+ else
+ return PHY_INTF_SEL_SGMII;
+ }
+
return -EINVAL;
}
@@ -151,7 +219,20 @@ int stmmac_integrated_pcs_init(struct stmmac_priv *priv,
spcs->int_mask = pcs_info->int_mask;
spcs->pcs.ops = &dwmac_integrated_pcs_ops;
+ /* If the PCS supports extended status, then it supports BASE-X AN
+ * with a TBI interface to the SerDes. Otherwise, we can support
+ * BASE-X without AN using SGMII, which is required for qcom-ethqos.
+ */
+ if (readl(spcs->base + GMAC_AN_STATUS) & BMSR_ESTATEN)
+ spcs->support_tbi_rtbi = true;
+
__set_bit(PHY_INTERFACE_MODE_SGMII, spcs->pcs.supported_interfaces);
+ __set_bit(PHY_INTERFACE_MODE_1000BASEX, spcs->pcs.supported_interfaces);
+
+ /* Only allow 2500BASE-X if the SerDes has support. */
+ if (priv->plat->flags & STMMAC_FLAG_SERDES_SUPPORTS_2500M)
+ __set_bit(PHY_INTERFACE_MODE_2500BASEX,
+ spcs->pcs.supported_interfaces);
priv->integrated_pcs = spcs;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index 09e609f111b1..b2b12d34b3dd 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -41,6 +41,7 @@ struct stmmac_pcs {
u32 rgsmii_status_mask;
u32 int_mask;
struct phylink_pcs pcs;
+ bool support_tbi_rtbi;
};
static inline struct stmmac_pcs *
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 937985276e6b..a8e9b5d3289f 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -213,6 +213,7 @@ enum dwmac_core_type {
#define STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP BIT(12)
#define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY BIT(13)
#define STMMAC_FLAG_KEEP_PREAMBLE_BEFORE_SFD BIT(14)
+#define STMMAC_FLAG_SERDES_SUPPORTS_2500M BIT(15)
struct mac_device_info;
--
2.47.3
next prev parent reply other threads:[~2026-03-13 12:29 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 12:28 [PATCH net-next 0/8] net: stmmac: improve PCS support Russell King (Oracle)
2026-03-13 12:28 ` [PATCH net-next 1/8] net: stmmac: add struct stmmac_pcs_info Russell King (Oracle)
2026-03-13 12:29 ` [PATCH net-next 2/8] net: stmmac: add support for reading inband SGMII status Russell King (Oracle)
2026-03-13 12:29 ` Russell King (Oracle) [this message]
2026-03-13 12:29 ` [PATCH net-next 4/8] net: stmmac: use integrated PCS for BASE-X modes Russell King (Oracle)
2026-03-13 12:29 ` [PATCH net-next 5/8] net: stmmac: qcom-ethqos: enable 2500BASE-X Russell King (Oracle)
2026-03-13 12:29 ` [PATCH net-next 6/8] net: stmmac: qcom-ethqos: enable inband mode for SGMII Russell King (Oracle)
2026-03-13 12:29 ` [PATCH net-next 7/8] net: stmmac: configure SGMII AN control according to phylink Russell King (Oracle)
2026-03-13 12:29 ` [PATCH net-next 8/8] net: stmmac: report PCS configuration changes Russell King (Oracle)
2026-03-13 18:42 ` Russell King (Oracle)
2026-03-15 23:45 ` [PATCH net-next 0/8] net: stmmac: improve PCS support Mohd Ayaan Anwar
2026-03-16 1:11 ` Russell King (Oracle)
2026-03-17 14:48 ` Russell King (Oracle)
2026-03-18 22:12 ` Mohd Ayaan Anwar
2026-03-19 0:35 ` Russell King (Oracle)
2026-03-19 9:24 ` Russell King (Oracle)
2026-03-19 10:09 ` Konrad Dybcio
2026-03-19 12:58 ` Russell King (Oracle)
2026-03-19 13:50 ` Konrad Dybcio
2026-03-19 15:11 ` Russell King (Oracle)
2026-03-23 20:23 ` Mohd Ayaan Anwar
2026-03-24 9:14 ` Russell King (Oracle)
2026-03-18 21:59 ` Mohd Ayaan Anwar
2026-03-16 13:51 ` Russell King (Oracle)
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