RE: [PATCH iwl-next v2] ice: update ice_link_mode_str_high() with 200G

["Loktionov, Aleksandr" <aleksandr.loktionov@intel.com>]

> -----Original Message-----
> From: Simon Horman <horms@kernel.org>
> Sent: Tuesday, March 24, 2026 7:16 PM
> To: Loktionov, Aleksandr <aleksandr.loktionov@intel.com>
> Cc: intel-wired-lan@lists.osuosl.org; Nguyen, Anthony L
> <anthony.l.nguyen@intel.com>; netdev@vger.kernel.org; Greenwalt, Paul
> <paul.greenwalt@intel.com>
> Subject: Re: [PATCH iwl-next v2] ice: update ice_link_mode_str_high()
> with 200G
> 
> On Mon, Mar 23, 2026 at 09:58:40AM +0100, Aleksandr Loktionov wrote:
> > From: Paul Greenwalt <paul.greenwalt@intel.com>
> >
> > Update ice_link_mode_str_high() with strings for 200G PHY types.
> > Without these entries the ice_dump_phy_type() debug helper prints
> > nothing for phy_type_high bits [5..15], covering all 200G and
> > 400GBASE-FR8 PHY types supported by E825C hardware.
> >
> > Also add the corresponding ICE_PHY_TYPE_HIGH_* bit definitions for
> > indices 13-15 (200G_AUI8_AOC_ACC, 200G_AUI8, 400GBASE_FR8) that were
> > missing from ice_adminq_cmd.h, and update
> ICE_PHY_TYPE_HIGH_MAX_INDEX
> > from 12 to 15.  Without these definitions ice_get_phy_type_high()
> > would stop iterating at index 12, leaving the new PHY types
> invisible
> > to all code that bounds-checks against MAX_INDEX.
> >
> > Fixes: none (new hardware support)
> 
> AFAIK this is not a valid Fixes tag.
> If it's not a fix, please simply omit the tag.
> If you want to say something about why then use free form text.
> 
Good day, Simon
There is v3 version, please have a look

> > Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
> > Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
> > ---
> > v1 -> v2 update ICE_PHY_TYPE_HIGH_MAX_INDEX
> 
> ...