From: Andrew Lunn <andrew@lunn.ch>
To: Angelo Dureghello <angelo@kernel-space.org>
Cc: Vladimir Oltean <olteanv@gmail.com>, netdev@vger.kernel.org
Subject: Re: mv88e6321, dual cpu port
Date: Mon, 6 Feb 2023 14:24:37 +0100 [thread overview]
Message-ID: <Y+D/lYul5X0JuHOR@lunn.ch> (raw)
In-Reply-To: <1423df62-11aa-bbe3-8573-e5fd4fb17bbb@kernel-space.org>
> This is what i am testing now, a bit different,
> swapped ports 5 and 6.
>
> #
> # Configuration:
> # cpu +---- port0
> # br0 eth0 <-> rgmii port 6 -+---- port1
> # |
> # +---- port2
> #
> # user +---- port3
> # br1 eth1 <-> rmii port 5 -+-----port4
> #
> #
>
> mdio {
> #address-cells = <1>;
> #size-cells = <0>;
>
> switch1: switch1@1d {
> compatible = "marvell,mv88e6085";
> reg = <0x1d>;
> interrupt-parent = <&lsio_gpio3>;
> interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
> interrupt-controller;
> #interrupt-cells = <2>;
>
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port@0 {
> reg = <0>;
> label = "port0";
> phy-mode = "1000base-x";
> managed = "in-band-status";
> sfp = <&sfp_0>;
> };
> port@1 {
> reg = <1>;
> label = "port1";
> phy-mode = "1000base-x";
> managed = "in-band-status";
> sfp = <&sfp_1>;
> };
> /* This is phyenet0 now */
> port@2 {
> reg = <2>;
> label = "port2";
> phy-handle = <&switchphy2>;
> };
> port@6 {
> /* wired to cpu fec1 */
> reg = <6>;
> label = "cpu";
> ethernet = <&fec1>;
> fixed-link = <0 1 1000 0 0>;
This is the deprecated way to do fixed link. Use
fixed-link {
speed = <1000>;
full-duplex;
};
> };
> port@3 {
> /* phy is internal to the switch */
> reg = <3>;
> label = "port3";
> phy-handle = <&switchphy3>;
> };
> port@4 {
> /* phy is internal to the switch */
> reg = <4>;
> label = "port4";
> phy-handle = <&switchphy4>;
> };
> port@5 {
> /* wired to cpu fec2 */
> reg = <5>;
> label = "port5";
> ethernet = <&fec2>;
This is wrong. As far as the switch is concerned, this port is nothing
special. It is just a regular user port. So it should not have an
ethernet property.
> fixed-link = <1 1 100 0 0>;
> };
> };
>
> All seems to work properly, but on ports 0, 1, 2 i cannot go
> over 100Mbit even if master port (6) is rgmii
> (testing by iperf3).
What SoC is this? Some FECs are only Fast ethernet.
What does ethtool show for eth0?
Do you also have a fixed link in the fec node?
Andrew
next prev parent reply other threads:[~2023-02-06 13:25 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-09 20:40 mv88e6321, dual cpu port Angelo Dureghello
2023-01-09 21:33 ` Andrew Lunn
2023-01-10 10:23 ` Angelo Dureghello
2023-01-10 22:22 ` Vladimir Oltean
2023-01-10 23:02 ` Andrew Lunn
2023-01-23 8:52 ` Angelo Dureghello
2023-01-23 11:28 ` Vladimir Oltean
2023-01-23 13:26 ` Angelo Dureghello
2023-01-23 19:18 ` Vladimir Oltean
2023-01-23 20:08 ` Andrew Lunn
2023-01-24 7:21 ` Angelo Dureghello
2023-01-24 11:41 ` Vladimir Oltean
2023-01-24 13:57 ` Andrew Lunn
2023-01-25 9:04 ` Angelo Dureghello
2023-02-06 10:43 ` Angelo Dureghello
2023-02-06 13:24 ` Andrew Lunn [this message]
2023-02-16 11:20 ` Angelo Dureghello
2023-02-16 12:50 ` Vladimir Oltean
2023-02-16 12:59 ` Andrew Lunn
2023-02-16 15:31 ` Vladimir Oltean
2023-02-16 18:39 ` Angelo Dureghello
2023-02-18 13:30 ` Vladimir Oltean
2023-02-18 13:56 ` Russell King (Oracle)
2023-02-16 14:24 ` Angelo Dureghello
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