From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 373ADC4332F for ; Thu, 10 Nov 2022 13:05:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230152AbiKJNFe (ORCPT ); Thu, 10 Nov 2022 08:05:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230156AbiKJNFc (ORCPT ); Thu, 10 Nov 2022 08:05:32 -0500 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E8471A388; Thu, 10 Nov 2022 05:05:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=M3EWxCFBGMPsU5MZUwlkMDxDdNXjGbuI2esV7j5ms8c=; b=vjF838VlxZ+w3ICZR0366s/hYy HeabKdkwiUMKyHoIeFEaZXY0u+KqrKOLvO+tJTLbE11Ksu/Rk8WdcfmIvYemdgU/u87FHmIAfYFmm gixo3WPYvQFs962T68SUC31ExIqnqVU0uOkv21av5TtZZBbOdAj+to/805wqutXVlTpo=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1ot7E1-002220-2k; Thu, 10 Nov 2022 14:04:09 +0100 Date: Thu, 10 Nov 2022 14:04:09 +0100 From: Andrew Lunn To: Jan Petrous Cc: Chester Lin , Andreas =?iso-8859-1?Q?F=E4rber?= , Rob Herring , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Krzysztof Kozlowski , "netdev@vger.kernel.org" , dl-S32 , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Matthias Brugger Subject: Re: [EXT] Re: [PATCH 2/5] dt-bindings: net: add schema for NXP S32CC dwmac glue driver Message-ID: References: <20221031101052.14956-1-clin@suse.com> <20221031101052.14956-3-clin@suse.com> <20221102155515.GA3959603-robh@kernel.org> <2a7ebef4-77cc-1c26-ec6d-86db5ee5a94b@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Thu, Nov 10, 2022 at 08:51:43AM +0000, Jan Petrous wrote: > Hi Andrew, > > > > > Here I just focus on GMAC since there are other LAN interfaces that S32 > > > > family > > > > uses [e.g. PFE]. According to the public GMACSUBSYS ref manual rev2[1] > > > > provided > > > > on NXP website, theoretically GMAC can run SGMII in 1000Mbps and > > > > 2500Mbps so I > > > > assume that supporting 1000BASE-X could be achievable. I'm not sure if > > any > > > > S32 > > > > board variant might have SFP ports but RJ-45 [1000BASE-T] should be the > > > > major > > > > type used on S32G-EVB and S32G-RDB2. > > > > > > > > @NXP, please feel free to correct me if anything wrong. > > > > > > > > > > NXP eval boards (EVB or RDB) have also 2.5G PHYs, so together with SerDes > > > driver we support 100M/1G/2.5G on such copper PHYs. > > > > Hi Jan > > > > Does the SERDES clock need to change when going between 1000BaseX and > > 2500BaseX? > > > > If so, it sounds like Linux not having control of that clock is going > > to limit what can be supported. > > No, the SerDes clock remains the same, the change is done internally, without > any necessity of clock change intervention by GMAC driver. Hi Jan Thanks for the information. So this binding should work. The only suggestion i have is that the binding does not call is SGMII clock, because it is used for more than SGMII, also 1000base-X, and 2500Base-X. So PCS clock might be better. Andrew