Crosschip bridge functionality

[Colin Foster <colin.foster@in-advantage.com>]

Hello,

I've been looking into what it would take to add the Distributed aspect
to the Felix driver, and I have some general questions about the theory
of operation and if there are any limitations I don't foresee. It might
be a fair bit of work for me to get hardware to even test, so avoiding
dead ends early would be really nice!

Also it seems like all the existing Felix-like hardware is all
integrated into a SOC, so there's really no other potential users at
this time.

For a distributed setup, it looks like I'd just need to create
felix_crosschip_bridge_{join,leave} routines, and use the mv88e6xxx as a
template. These routines would create internal VLANs where, assuming
they use a tagging protocol that the switch can offload (your
documentation specifically mentions Marvell-tagged frames for this
reason, seemingly) everything should be fully offloaded to the switches.

What's the catch?

In the Marvell case, is there any gotcha where "under these scenarios,
the controlling CPU needs to process packets at line rate"?

Thanks for all the great documentation and guidance! (and patience)


Colin Foster