From: Andrew Lunn <andrew@lunn.ch>
To: "Frank.Sae" <Frank.Sae@motor-comm.com>
Cc: Peter Geis <pgwipeout@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
xiaogang.fan@motor-comm.com, fei.zhang@motor-comm.com,
hua.sun@motor-comm.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH net-next v1 1/3] dt-bindings: net: Add Motorcomm yt8xxx ethernet phy Driver bindings
Date: Wed, 11 Jan 2023 14:07:31 +0100 [thread overview]
Message-ID: <Y760k6/pKdjwu1fU@lunn.ch> (raw)
In-Reply-To: <83fd7a69-7e6a-ab93-b05a-4eba8af4d245@motor-comm.com>
> RX delay = rx-delay-basic (0ns or 1.9ns) + x-delay-additional-ps
> (N*150ps, N = 0 ~ 15)
> If rx-delay-basic is removed and controlled by phy-mode.
> when phy-mode is rgmii-id or rgmii-rxid, RX delay is 1.9ns + N*150ps.
> But sometimes 1.9ns is still too big, we just need 0ns + N*150ps.
>
> For this case, can we do like following ?
> rx-internal-delay-ps:
> enum: [ 0, 150, 300, 450, 600, 750, 900, 1050, 1200, 1350, 1500,
> 1650, 1800, 1900, 1950, 2050, 2100, 2200, 2250, 2350, 2500, 2650, 2800,
> 2950, 3100, 3250, 3400, 3550, 3700, 3850, 4000, 4150 ]
> default: 0
> rx-internal-delay-ps is 0ns + N*150ps and 1.9ns + N*150ps.
> And check whether need rx-delay-basic (1.9ns) by the val of
> rx-internal-delay-ps?
Nothing says delays are only positive. So you could have rgmii-id or
rgmii-rxid and a rx-internal-delay-ps of -150, if you need less than
1.9ns.
As i said, rx-internal-delay-ps is used to fine tune the delay.
> We can't reduce this down to tx-clk-inverted.
> There are two mac and two yt8531 on their board. Each of yt8531 need
> different config in DTS. They need adjust tx clk delay in
> link_change_notify callback function according to current speed.
>
> They configured tx-clk-xxxx-inverted like this :
>
> speed GMAC0 GMAC1
> 1000M 1 0 tx-clk-1000-inverted
> 100M 1 1 tx-clk-100-inverted
> 10M 0/1 0/1 tx-clk-10-inverted
What MAC is this? It seems very oddly designed, getting close to
broken. I've not seen any other MAC/PHY combination need anything like
this.
> Can we put tx-clk-adj-enabled, tx-clk-10-inverted, tx-clk-100-inverted
> and tx-clk-1000-inverted in tx-clk-10-inverted like bit in byte?
No, they are individual boolean properties, so should be kept as they
are. But i really think somebody should be looking deep into the MAC
design to understand why it is like this, and if the MAC can sort out
this mess itself.
Andrew
next prev parent reply other threads:[~2023-01-11 13:08 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-05 7:30 [PATCH net-next v1 0/3] add dts for yt8521 and yt8531s, add driver for yt8531 Frank
2023-01-05 7:30 ` [PATCH net-next v1 1/3] dt-bindings: net: Add Motorcomm yt8xxx ethernet phy Driver bindings Frank
2023-01-05 13:17 ` Andrew Lunn
2023-01-06 6:51 ` Frank
2023-01-06 13:55 ` Andrew Lunn
2023-01-11 9:20 ` Frank.Sae
2023-01-11 13:07 ` Andrew Lunn [this message]
2023-01-16 2:49 ` Frank.Sae
[not found] ` <9b047a2a-ccd8-6079-efbf-5cb880bf5044@starfivetech.com>
2023-01-17 13:16 ` Andrew Lunn
2023-01-18 13:40 ` Andrew Lunn
2023-01-19 5:56 ` Frank.Sae
2023-01-06 8:26 ` Krzysztof Kozlowski
2023-01-06 9:17 ` Frank.Sae
2023-01-06 9:25 ` Krzysztof Kozlowski
2023-01-06 13:58 ` Andrew Lunn
2023-01-05 7:30 ` [PATCH net-next v1 2/3] net: phy: Add dts support for Motorcomm yt8521/yt8531s gigabit ethernet phy Frank
2023-01-05 9:01 ` Arun.Ramadoss
2023-01-06 5:24 ` Frank
2023-01-05 17:03 ` Andrew Lunn
2023-01-06 7:42 ` Frank.Sae
2023-01-06 13:32 ` Andrew Lunn
2023-01-05 7:30 ` [PATCH net-next v1 3/3] net: phy: Add driver for Motorcomm yt8531 " Frank
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