Re: [PATCH v2] net: phy: realtek: Add support for RTL9000AA/AN

[Andrew Lunn <andrew@lunn.ch>]

On Thu, Jan 14, 2021 at 08:38:12AM +0000, ashiduka@fujitsu.com wrote:
> Hi Andrew
> 
> > For T1, it seems like Master is pretty important. Do you have
> > information to be able to return the current Master/slave
> > configuration, or allow it to be configured? See the nxp-tja11xx.c for
> > an example.
> 
> Do you know how to switch between master/slave?

There was a patch to ethtool merged for this:

commit 558f7cc33daf82f945af432c79db40edcbe0dad0
Author: Oleksij Rempel <o.rempel@pengutronix.de>
Date:   Wed Jun 10 10:37:43 2020 +0200

    netlink: add master/slave configuration support
    
    This UAPI is needed for BroadR-Reach 100BASE-T1 devices. Due to lack of
    auto-negotiation support, we needed to be able to configure the
    MASTER-SLAVE role of the port manually or from an application in user
    space.
    
    The same UAPI can be used for 1000BASE-T or MultiGBASE-T devices to
    force MASTER or SLAVE role. See IEEE 802.3-2018:
    22.2.4.3.7 MASTER-SLAVE control register (Register 9)
    22.2.4.3.8 MASTER-SLAVE status register (Register 10)
    40.5.2 MASTER-SLAVE configuration resolution
    45.2.1.185.1 MASTER-SLAVE config value (1.2100.14)
    45.2.7.10 MultiGBASE-T AN control 1 register (Register 7.32)
    
    The MASTER-SLAVE role affects the clock configuration:
    
    -------------------------------------------------------------------------------
    When the  PHY is configured as MASTER, the PMA Transmit function shall
    source TX_TCLK from a local clock source. When configured as SLAVE, the
    PMA Transmit function shall source TX_TCLK from the clock recovered from
    data stream provided by MASTER.
    
    iMX6Q                     KSZ9031                XXX
    ------\                /-----------\        /------------\
          |                |           |        |            |
     MAC  |<----RGMII----->| PHY Slave |<------>| PHY Master |
          |<--- 125 MHz ---+-<------/  |        | \          |
    ------/                \-----------/        \------------/
                                                   ^
                                                    \-TX_TCLK
    
    -------------------------------------------------------------------------------

    Andrew