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From: Ansuel Smith <ansuelsmth@gmail.com>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
	Vivien Didelot <vivien.didelot@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [net-next PATCH] net: dsa: qca8k: make sure PAD0 MAC06 exchange is disabled
Date: Tue, 2 Nov 2021 19:28:50 +0100	[thread overview]
Message-ID: <YYGDYoToj2r/uYIE@Ansuel-xps.localdomain> (raw)
In-Reply-To: <20211102182655.t74adxlw3q3ctlas@skbuf>

On Tue, Nov 02, 2021 at 08:26:55PM +0200, Vladimir Oltean wrote:
> On Tue, Nov 02, 2021 at 06:56:29PM +0100, Ansuel Smith wrote:
> > Some device set MAC06 exchange in the bootloader. This cause some
> > problem as we don't support this strange mode and we just set the port6
> > as the primary CPU port. With MAC06 exchange, PAD0 reg configure port6
> > instead of port0. Add an extra check and explicitly disable MAC06 exchange
> > to correctly configure the port PAD config.
> > 
> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > ---
> 
> Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
> 
> Since net-next has closed, please add
> 
> Fixes: 3fcf734aa482 ("net: dsa: qca8k: add support for cpu port 6")
> 
> and resend to the "net" tree.
>

Oh sorry! I checked http://vger.kernel.org/~davem/net-next.html
before posting and it does say it's open. Will resend sorry.

> >  drivers/net/dsa/qca8k.c | 8 ++++++++
> >  drivers/net/dsa/qca8k.h | 1 +
> >  2 files changed, 9 insertions(+)
> > 
> > Some comments here:
> > Resetting the switch using the sw reg doesn't reset the port PAD
> > configuration. I was thinking if it would be better to clear all the
> > pad configuration but considering that the entire reg is set by phylink
> > mac config, I think it's not necessary as the PAD related to the port will
> > be reset anyway with the new values. Have a dirty configuration on PAD6
> > doesn't cause any problem as we have that port disabled and it would be
> > reset and configured anyway if defined.
> > 
> > diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
> > index ea7f12778922..a429c9750add 100644
> > --- a/drivers/net/dsa/qca8k.c
> > +++ b/drivers/net/dsa/qca8k.c
> > @@ -1109,6 +1109,14 @@ qca8k_setup(struct dsa_switch *ds)
> >  	if (ret)
> >  		return ret;
> >  
> > +	/* Make sure MAC06 is disabled */
> > +	ret = qca8k_reg_clear(priv, QCA8K_REG_PORT0_PAD_CTRL,
> > +			      QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN);
> > +	if (ret) {
> > +		dev_err(priv->dev, "failed disabling MAC06 exchange");
> > +		return ret;
> > +	}
> > +
> >  	/* Enable CPU Port */
> >  	ret = qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0,
> >  			    QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
> > diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h
> > index e10571a398c9..128b8cf85e08 100644
> > --- a/drivers/net/dsa/qca8k.h
> > +++ b/drivers/net/dsa/qca8k.h
> > @@ -34,6 +34,7 @@
> >  #define   QCA8K_MASK_CTRL_DEVICE_ID_MASK		GENMASK(15, 8)
> >  #define   QCA8K_MASK_CTRL_DEVICE_ID(x)			((x) >> 8)
> >  #define QCA8K_REG_PORT0_PAD_CTRL			0x004
> > +#define   QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN		BIT(31)
> >  #define   QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE	BIT(19)
> >  #define   QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE	BIT(18)
> >  #define QCA8K_REG_PORT5_PAD_CTRL			0x008
> > -- 
> > 2.32.0
> > 

-- 
	Ansuel

  reply	other threads:[~2021-11-02 18:28 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-02 17:56 [net-next PATCH] net: dsa: qca8k: make sure PAD0 MAC06 exchange is disabled Ansuel Smith
2021-11-02 18:26 ` Vladimir Oltean
2021-11-02 18:28   ` Ansuel Smith [this message]
2021-11-02 18:38     ` Vladimir Oltean

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