From: Andrew Lunn <andrew@lunn.ch>
To: Ansuel Smith <ansuelsmth@gmail.com>
Cc: Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [net-next RFC PATCH 0/6] Add support for qca8k mdio rw in Ethernet packet
Date: Tue, 7 Dec 2021 19:41:23 +0100 [thread overview]
Message-ID: <Ya+q02HlWsHMYyAe@lunn.ch> (raw)
In-Reply-To: <20211207145942.7444-1-ansuelsmth@gmail.com>
> I still have to find a solution to a slowdown problem and this is where
> I would love to get some hint.
> Currently I still didn't find a good way to understand when the tagger
> starts to accept packets and because of this the initial setup is slow
> as every completion timeouts. Am I missing something or is there a way
> to check for this?
I've not looked at this particular driver, i just know the general
architecture.
The MDIO bus driver probes first, maybe as part of the Ethernet
driver, maybe as a standalone MDIO driver. The switch is found in DT
and the driver code will at some point later probe the switch driver.
The switch driver has working MDIO at this point. It should use MDIO
to talk to the switch, make sure it is there, maybe do some initial
configuration. Once it is happy, it registers the switch with the DSA
core using dsa_register_switch().
If this is a single switch, the DSA core will then start setting
things up. As part of dsa_switch_setup() it will call the switch
drivers setup() method. It then figures out what tag driver to use, by
calling dsa_switch_setup_tag_protocol(). However, the tag driver
itself is not inserted into the chain yet. That happens later. Once
the switch is setup, dsa_tree_setup_master() is called which does
dsa_master_setup() and in the middle there is:
/* If we use a tagging format that doesn't have an ethertype
* field, make sure that all packets from this point on get
* sent to the tag format's receive function.
*/
wmb();
dev->dsa_ptr = cpu_dp;
This is the magic to actually enable the tagger receiving frames.
I need to look at your patches, but why is the tagger involved? At
least for the Marvell switch, you send a pretty normal looking
Ethernet frame to a specific MAC address, and the switch replies using
that MAC address. And it has an Ether Type specific to switch
control. Since this is all normal looking, there are hooks in the
network stack which can be used to get these frames.
Andrew
next prev parent reply other threads:[~2021-12-07 18:41 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-07 14:59 [net-next RFC PATCH 0/6] Add support for qca8k mdio rw in Ethernet packet Ansuel Smith
2021-12-07 14:59 ` [net-next RFC PATCH 1/6] net: dsa: tag_qca: convert to FIELD macro Ansuel Smith
2021-12-07 14:59 ` [net-next RFC PATCH 2/6] net: dsa: tag_qca: move define to include linux/dsa Ansuel Smith
2021-12-07 14:59 ` [net-next RFC PATCH 3/6] net: dsa: tag_qca: add define for mdio read/write in ethernet packet Ansuel Smith
2021-12-07 14:59 ` [net-next RFC PATCH 4/6] net: dsa: qca8k: Add support for mdio read/write in Ethernet packet Ansuel Smith
2021-12-07 14:59 ` [net-next RFC PATCH 5/6] net: dsa: tag_qca: Add support for handling mdio read/write packet Ansuel Smith
2021-12-07 14:59 ` [net-next RFC PATCH 6/6] net: dsa: qca8k: cache lo and hi for mdio write Ansuel Smith
2021-12-07 15:15 ` [net-next RFC PATCH 0/6] Add support for qca8k mdio rw in Ethernet packet Andrew Lunn
2021-12-07 15:33 ` Ansuel Smith
2021-12-07 18:49 ` Florian Fainelli
2021-12-07 19:44 ` Ansuel Smith
2021-12-07 21:10 ` Vladimir Oltean
2021-12-07 22:01 ` Ansuel Smith
2021-12-07 22:37 ` Andrew Lunn
2021-12-07 18:41 ` Andrew Lunn [this message]
2021-12-07 18:53 ` Ansuel Smith
2021-12-07 19:15 ` Andrew Lunn
2021-12-07 19:21 ` Ansuel Smith
2021-12-07 20:52 ` Vladimir Oltean
2021-12-07 21:47 ` Ansuel Smith
2021-12-07 22:22 ` Andrew Lunn
2021-12-07 22:30 ` Ansuel Smith
2021-12-07 22:46 ` Andrew Lunn
2021-12-07 23:47 ` Vladimir Oltean
2021-12-08 0:04 ` Vladimir Oltean
2021-12-08 0:40 ` Vladimir Oltean
2021-12-08 0:42 ` Ansuel Smith
2021-12-08 1:09 ` Vladimir Oltean
2021-12-08 3:32 ` Ansuel Smith
2021-12-08 11:54 ` Vladimir Oltean
2021-12-08 1:15 ` Andrew Lunn
2021-12-07 22:45 ` Vladimir Oltean
2021-12-07 22:54 ` Andrew Lunn
2021-12-07 23:14 ` Vladimir Oltean
2021-12-08 1:35 ` Andrew Lunn
2021-12-08 3:39 ` Ansuel Smith
2021-12-08 11:51 ` Vladimir Oltean
2021-12-07 23:05 ` Ansuel Smith
2021-12-07 23:20 ` Vladimir Oltean
2021-12-07 23:24 ` Ansuel Smith
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