From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B945C433EF for ; Fri, 3 Dec 2021 15:58:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381932AbhLCQCJ (ORCPT ); Fri, 3 Dec 2021 11:02:09 -0500 Received: from new1-smtp.messagingengine.com ([66.111.4.221]:39485 "EHLO new1-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1381936AbhLCQBu (ORCPT ); Fri, 3 Dec 2021 11:01:50 -0500 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailnew.nyi.internal (Postfix) with ESMTP id D5DC2580299; Fri, 3 Dec 2021 10:58:25 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Fri, 03 Dec 2021 10:58:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=JjPqo0 7GzclQowIXgO11ef1Z0XrbTc75Ybow2HLgDHM=; b=f4shhmDNENyDIebbipMSlH ZDnY9Qay2V4O8BXWtRSo/7eU3xDc0vBMjSuTuSj0ailJOl9sIASZGKUiHgCMVPNm fVdUcOWgvvMP2w0HCG1jVP8bO65EfZFVHuRZ4lZ5qU8t1Bp6OWnXLPGrq3dbUTBA 1KuxcogyhdAY4VNH2JQW84eWLB3y4+TRnr/dBvzTcnQV2o5cpo7RWM6xFDP9wl1C 4PE0q9VRN3Bg5F9ETZIQ1ZA3vjedBaIbuFxdoKqhzs2Z7tlH+2prWtK1pXru0srq IBr5kpvqCzQTkULEUR3IssG1lUXVd0bPifWPKX1KUpFBSWqXP4WM/Rlg1PPPqXgQ == X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvuddrieejgdekhecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpeffhffvuffkfhggtggujgesthdtredttddtvdenucfhrhhomhepkfguohcuufgt hhhimhhmvghluceoihguohhstghhsehiughoshgthhdrohhrgheqnecuggftrfgrthhtvg hrnheptdffkeekfeduffevgeeujeffjefhtefgueeugfevtdeiheduueeukefhudehleet necuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepihguoh hstghhsehiughoshgthhdrohhrgh X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 3 Dec 2021 10:58:23 -0500 (EST) Date: Fri, 3 Dec 2021 17:58:20 +0200 From: Ido Schimmel To: "Machnikowski, Maciej" Cc: Petr Machata , "netdev@vger.kernel.org" , "intel-wired-lan@lists.osuosl.org" , "Kubalewski, Arkadiusz" , "richardcochran@gmail.com" , "abyagowi@fb.com" , "Nguyen, Anthony L" , "davem@davemloft.net" , "kuba@kernel.org" , "linux-kselftest@vger.kernel.org" , "mkubecek@suse.cz" , "saeed@kernel.org" , "michael.chan@broadcom.com" Subject: Re: [PATCH v4 net-next 2/4] ethtool: Add ability to configure recovered clock for SyncE feature Message-ID: References: <20211201180208.640179-1-maciej.machnikowski@intel.com> <20211201180208.640179-3-maciej.machnikowski@intel.com> <87pmqdojby.fsf@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, Dec 03, 2021 at 02:55:05PM +0000, Machnikowski, Maciej wrote: > If you have 32 port switch chip with 2 recovered clock outputs how will you > tell the chip to get the 18th port to pin 0 and from port 20 to pin 1? That's > the part those patches addresses. The further side of "which clock should the > EEC use" belongs to the DPLL subsystem and I agree with that. > > Or to put it into different words: > This API will configure given quality level frequency reference outputs on chip's > Dedicated outputs. On a board you will connect those to the EEC's reference inputs. So these outputs are hardwired into the EEC's inputs and are therefore only meaningful as EEC inputs? If so, why these outputs are not configured via the EEC object? > > The EEC's job is to validate the inputs and lock to them following certain rules, > The PHY/MAC (and this API) job is to deliver reference signals to the EEC. >