From: Andrew Lunn <andrew@lunn.ch>
To: Conor.Dooley@microchip.com
Cc: palmer@rivosinc.com, apatel@ventanamicro.com,
netdev@vger.kernel.org, Nicolas.Ferre@microchip.com,
Claudiu.Beznea@microchip.com, linux@armlinux.org.uk,
hkallweit1@gmail.com, linux-riscv@lists.infradead.org
Subject: Re: riscv defconfig CONFIG_PM/macb/generic PHY regression in v5.18-rc1
Date: Tue, 5 Apr 2022 16:56:00 +0200 [thread overview]
Message-ID: <YkxYgDnWNxeXou3F@lunn.ch> (raw)
In-Reply-To: <9f4b057d-1985-5fd3-65c0-f944161c7792@microchip.com>
> Is this some sort of lack of support for CONFIG_PM=y in my clock driver,
> that's leading to the PHY getting stuck in reset?
> Or an interaction between CONFIG_PM=y & the macb/generic phy drivers?
What clock is driving the PHY? Sometimes the SoC outputs a clock to
the PHY, and the PHY will not work without it. Sometimes it is the
other way around, the PHY outputs a clock to SoC, so this might not be
your issue.
Maybe PM is turning the clock off because nothing is using it?
Andrew
next prev parent reply other threads:[~2022-04-05 20:10 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-05 13:05 riscv defconfig CONFIG_PM/macb/generic PHY regression in v5.18-rc1 Conor.Dooley
2022-04-05 13:25 ` Andrew Lunn
2022-04-05 14:18 ` Conor.Dooley
2022-04-05 14:41 ` Conor.Dooley
2022-04-05 14:49 ` Andrew Lunn
2022-04-05 14:56 ` Andrew Lunn [this message]
2022-04-05 15:04 ` Andrew Lunn
2022-04-05 16:25 ` Conor Dooley
2022-04-06 8:36 ` Conor.Dooley
2022-04-07 14:30 ` Conor.Dooley
2022-04-05 15:53 ` Russell King (Oracle)
2022-04-05 16:56 ` Palmer Dabbelt
2022-04-05 17:23 ` Conor Dooley
2022-04-05 18:06 ` Andrew Lunn
2022-04-05 18:35 ` Conor Dooley
2022-04-05 16:58 ` Conor Dooley
2022-04-05 18:55 ` Russell King (Oracle)
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