Re: [PATCH v2 3/3] ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9

[Andrew Lunn <andrew@lunn.ch>]

On Tue, Apr 19, 2022 at 01:27:09PM +0300, Josua Mayer wrote:
> Since SoM revision 1.9 the PHY has been replaced with an ADIN1300,
> add an entry for it next to the original.
> 
> Co-developed-by: Alvaro Karsz <alvaro.karsz@solid-run.com>
> Signed-off-by: Alvaro Karsz <alvaro.karsz@solid-run.com>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
> V1 -> V2: changed dts property name
> 
>  arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
> index f86efd0ccc40..d46182095d79 100644
> --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
> @@ -83,6 +83,12 @@ ethernet-phy@4 {
>  			qca,clk-out-frequency = <125000000>;
>  			qca,smarteee-tw-us-1g = <24>;
>  		};
> +
> +		/* ADIN1300 (som rev 1.9 or later) */
> +		ethernet-phy@1 {
> +			reg = <1>;
> +			adi,phy-output-clock = "125mhz-free-running";
> +		};

There is currently the comment:

                 * The PHY can appear at either address 0 or 4 due to the
                 * configuration (LED) pin not being pulled sufficiently.
                 */

It would be good to add another comment about this PHY at address 1.

   Andrew