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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id ch9-20020a5d5d09000000b0021da4b6c6f7sm2898365wrb.40.2022.07.11.04.58.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 04:58:17 -0700 (PDT) Date: Mon, 11 Jul 2022 12:57:52 +0100 From: Jean-Philippe Brucker To: Xu Kuohai Cc: bpf@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Will Deacon , KP Singh , Mark Rutland , Catalin Marinas , Daniel Borkmann , Alexei Starovoitov , Andrii Nakryiko , Zi Shen Lim , Martin KaFai Lau , Song Liu , Yonghong Song , John Fastabend , "David S . Miller" , Hideaki YOSHIFUJI , David Ahern , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" , Jakub Kicinski , Jesper Dangaard Brouer , Russell King , James Morse , Hou Tao , Jason Wang Subject: Re: [PATCH bpf-next v7 4/4] bpf, arm64: bpf trampoline for arm64 Message-ID: References: <20220708093032.1832755-1-xukuohai@huawei.com> <20220708093032.1832755-5-xukuohai@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220708093032.1832755-5-xukuohai@huawei.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, Jul 08, 2022 at 05:30:32AM -0400, Xu Kuohai wrote: > +static void invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l, > + int args_off, int retval_off, int run_ctx_off, > + bool save_ret) > +{ > + u32 *branch; > + u64 enter_prog; > + u64 exit_prog; > + u8 r0 = bpf2a64[BPF_REG_0]; > + struct bpf_prog *p = l->link.prog; > + int cookie_off = offsetof(struct bpf_tramp_run_ctx, bpf_cookie); > + > + if (p->aux->sleepable) { > + enter_prog = (u64)__bpf_prog_enter_sleepable; > + exit_prog = (u64)__bpf_prog_exit_sleepable; > + } else { > + enter_prog = (u64)__bpf_prog_enter; > + exit_prog = (u64)__bpf_prog_exit; > + } > + > + if (l->cookie == 0) { > + /* if cookie is zero, one instruction is enough to store it */ > + emit(A64_STR64I(A64_ZR, A64_SP, run_ctx_off + cookie_off), ctx); > + } else { > + emit_a64_mov_i64(A64_R(10), l->cookie, ctx); > + emit(A64_STR64I(A64_R(10), A64_SP, run_ctx_off + cookie_off), > + ctx); > + } > + > + /* save p to callee saved register x19 to avoid loading p with mov_i64 > + * each time. > + */ > + emit_addr_mov_i64(A64_R(19), (const u64)p, ctx); > + > + /* arg1: prog */ > + emit(A64_MOV(1, A64_R(0), A64_R(19)), ctx); > + /* arg2: &run_ctx */ > + emit(A64_ADD_I(1, A64_R(1), A64_SP, run_ctx_off), ctx); > + > + emit_call(enter_prog, ctx); > + > + /* if (__bpf_prog_enter(prog) == 0) > + * goto skip_exec_of_prog; > + */ > + branch = ctx->image + ctx->idx; > + emit(A64_NOP, ctx); > + > + /* save return value to callee saved register x20 */ > + emit(A64_MOV(1, A64_R(20), A64_R(0)), ctx); > + > + emit(A64_ADD_I(1, A64_R(0), A64_SP, args_off), ctx); > + if (!p->jited) > + emit_addr_mov_i64(A64_R(1), (const u64)p->insnsi, ctx); > + > + emit_call((const u64)p->bpf_func, ctx); > + > + /* store return value, which is held in r0 for JIT and in x0 > + * for interpreter. > + */ > + if (save_ret) > + emit(A64_STR64I(p->jited ? r0 : A64_R(0), A64_SP, retval_off), > + ctx); This should be only A64_R(0), not r0. r0 happens to equal A64_R(0) when jitted due to the way build_epilogue() builds the function at the moment, but we shouldn't rely on that. Apart from that, for the series Reviewed-by: Jean-Philippe Brucker