* [PATCH net v2] net: renesas: rswitch: fix initial MPIC register setting
@ 2024-12-11 5:30 Nikita Yushchenko
2024-12-11 6:15 ` Michal Swiatkowski
2024-12-12 14:40 ` patchwork-bot+netdevbpf
0 siblings, 2 replies; 3+ messages in thread
From: Nikita Yushchenko @ 2024-12-11 5:30 UTC (permalink / raw)
To: Yoshihiro Shimoda, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Geert Uytterhoeven
Cc: netdev, linux-renesas-soc, linux-kernel, Michael Dege,
Christian Mardmoeller, Dennis Ostermann, Nikita Yushchenko
MPIC.PIS must be set per phy interface type.
MPIC.LSC must be set per speed.
Do that strictly per datasheet, instead of hardcoding MPIC.PIS to GMII.
Fixes: 3590918b5d07 ("net: ethernet: renesas: Add support for "Ethernet Switch"")
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
---
v1: https://lore.kernel.org/netdev/20241209075951.163924-1-nikita.yoush@cogentembedded.com/
changes: regenerate against top of net tree (commit 3dd002f20098 "net:
renesas: rswitch: handle stop vs interrupt race") to ensure it
applies cleanly
---
drivers/net/ethernet/renesas/rswitch.c | 27 ++++++++++++++++++++------
drivers/net/ethernet/renesas/rswitch.h | 14 ++++++-------
2 files changed, 28 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/renesas/rswitch.c b/drivers/net/ethernet/renesas/rswitch.c
index 6ec714789573..dbbbf024e7ab 100644
--- a/drivers/net/ethernet/renesas/rswitch.c
+++ b/drivers/net/ethernet/renesas/rswitch.c
@@ -1116,25 +1116,40 @@ static int rswitch_etha_wait_link_verification(struct rswitch_etha *etha)
static void rswitch_rmac_setting(struct rswitch_etha *etha, const u8 *mac)
{
- u32 val;
+ u32 pis, lsc;
rswitch_etha_write_mac_address(etha, mac);
+ switch (etha->phy_interface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ pis = MPIC_PIS_GMII;
+ break;
+ case PHY_INTERFACE_MODE_USXGMII:
+ case PHY_INTERFACE_MODE_5GBASER:
+ pis = MPIC_PIS_XGMII;
+ break;
+ default:
+ pis = FIELD_GET(MPIC_PIS, ioread32(etha->addr + MPIC));
+ break;
+ }
+
switch (etha->speed) {
case 100:
- val = MPIC_LSC_100M;
+ lsc = MPIC_LSC_100M;
break;
case 1000:
- val = MPIC_LSC_1G;
+ lsc = MPIC_LSC_1G;
break;
case 2500:
- val = MPIC_LSC_2_5G;
+ lsc = MPIC_LSC_2_5G;
break;
default:
- return;
+ lsc = FIELD_GET(MPIC_LSC, ioread32(etha->addr + MPIC));
+ break;
}
- iowrite32(MPIC_PIS_GMII | val, etha->addr + MPIC);
+ rswitch_modify(etha->addr, MPIC, MPIC_PIS | MPIC_LSC,
+ FIELD_PREP(MPIC_PIS, pis) | FIELD_PREP(MPIC_LSC, lsc));
}
static void rswitch_etha_enable_mii(struct rswitch_etha *etha)
diff --git a/drivers/net/ethernet/renesas/rswitch.h b/drivers/net/ethernet/renesas/rswitch.h
index 72e3ff596d31..e020800dcc57 100644
--- a/drivers/net/ethernet/renesas/rswitch.h
+++ b/drivers/net/ethernet/renesas/rswitch.h
@@ -724,13 +724,13 @@ enum rswitch_etha_mode {
#define EAVCC_VEM_SC_TAG (0x3 << 16)
-#define MPIC_PIS_MII 0x00
-#define MPIC_PIS_GMII 0x02
-#define MPIC_PIS_XGMII 0x04
-#define MPIC_LSC_SHIFT 3
-#define MPIC_LSC_100M (1 << MPIC_LSC_SHIFT)
-#define MPIC_LSC_1G (2 << MPIC_LSC_SHIFT)
-#define MPIC_LSC_2_5G (3 << MPIC_LSC_SHIFT)
+#define MPIC_PIS GENMASK(2, 0)
+#define MPIC_PIS_GMII 2
+#define MPIC_PIS_XGMII 4
+#define MPIC_LSC GENMASK(5, 3)
+#define MPIC_LSC_100M 1
+#define MPIC_LSC_1G 2
+#define MPIC_LSC_2_5G 3
#define MDIO_READ_C45 0x03
#define MDIO_WRITE_C45 0x01
--
2.39.5
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH net v2] net: renesas: rswitch: fix initial MPIC register setting
2024-12-11 5:30 [PATCH net v2] net: renesas: rswitch: fix initial MPIC register setting Nikita Yushchenko
@ 2024-12-11 6:15 ` Michal Swiatkowski
2024-12-12 14:40 ` patchwork-bot+netdevbpf
1 sibling, 0 replies; 3+ messages in thread
From: Michal Swiatkowski @ 2024-12-11 6:15 UTC (permalink / raw)
To: Nikita Yushchenko
Cc: Yoshihiro Shimoda, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Geert Uytterhoeven, netdev,
linux-renesas-soc, linux-kernel, Michael Dege,
Christian Mardmoeller, Dennis Ostermann
On Wed, Dec 11, 2024 at 10:30:12AM +0500, Nikita Yushchenko wrote:
> MPIC.PIS must be set per phy interface type.
> MPIC.LSC must be set per speed.
>
> Do that strictly per datasheet, instead of hardcoding MPIC.PIS to GMII.
>
> Fixes: 3590918b5d07 ("net: ethernet: renesas: Add support for "Ethernet Switch"")
> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
> ---
> v1: https://lore.kernel.org/netdev/20241209075951.163924-1-nikita.yoush@cogentembedded.com/
> changes: regenerate against top of net tree (commit 3dd002f20098 "net:
> renesas: rswitch: handle stop vs interrupt race") to ensure it
> applies cleanly
> ---
> drivers/net/ethernet/renesas/rswitch.c | 27 ++++++++++++++++++++------
> drivers/net/ethernet/renesas/rswitch.h | 14 ++++++-------
> 2 files changed, 28 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/net/ethernet/renesas/rswitch.c b/drivers/net/ethernet/renesas/rswitch.c
> index 6ec714789573..dbbbf024e7ab 100644
> --- a/drivers/net/ethernet/renesas/rswitch.c
> +++ b/drivers/net/ethernet/renesas/rswitch.c
> @@ -1116,25 +1116,40 @@ static int rswitch_etha_wait_link_verification(struct rswitch_etha *etha)
>
> static void rswitch_rmac_setting(struct rswitch_etha *etha, const u8 *mac)
> {
> - u32 val;
> + u32 pis, lsc;
>
> rswitch_etha_write_mac_address(etha, mac);
>
> + switch (etha->phy_interface) {
> + case PHY_INTERFACE_MODE_SGMII:
> + pis = MPIC_PIS_GMII;
> + break;
> + case PHY_INTERFACE_MODE_USXGMII:
> + case PHY_INTERFACE_MODE_5GBASER:
> + pis = MPIC_PIS_XGMII;
> + break;
> + default:
> + pis = FIELD_GET(MPIC_PIS, ioread32(etha->addr + MPIC));
> + break;
> + }
> +
> switch (etha->speed) {
> case 100:
> - val = MPIC_LSC_100M;
> + lsc = MPIC_LSC_100M;
> break;
> case 1000:
> - val = MPIC_LSC_1G;
> + lsc = MPIC_LSC_1G;
> break;
> case 2500:
> - val = MPIC_LSC_2_5G;
> + lsc = MPIC_LSC_2_5G;
> break;
> default:
> - return;
> + lsc = FIELD_GET(MPIC_LSC, ioread32(etha->addr + MPIC));
> + break;
> }
>
> - iowrite32(MPIC_PIS_GMII | val, etha->addr + MPIC);
> + rswitch_modify(etha->addr, MPIC, MPIC_PIS | MPIC_LSC,
> + FIELD_PREP(MPIC_PIS, pis) | FIELD_PREP(MPIC_LSC, lsc));
> }
>
> static void rswitch_etha_enable_mii(struct rswitch_etha *etha)
> diff --git a/drivers/net/ethernet/renesas/rswitch.h b/drivers/net/ethernet/renesas/rswitch.h
> index 72e3ff596d31..e020800dcc57 100644
> --- a/drivers/net/ethernet/renesas/rswitch.h
> +++ b/drivers/net/ethernet/renesas/rswitch.h
> @@ -724,13 +724,13 @@ enum rswitch_etha_mode {
>
> #define EAVCC_VEM_SC_TAG (0x3 << 16)
>
> -#define MPIC_PIS_MII 0x00
> -#define MPIC_PIS_GMII 0x02
> -#define MPIC_PIS_XGMII 0x04
> -#define MPIC_LSC_SHIFT 3
> -#define MPIC_LSC_100M (1 << MPIC_LSC_SHIFT)
> -#define MPIC_LSC_1G (2 << MPIC_LSC_SHIFT)
> -#define MPIC_LSC_2_5G (3 << MPIC_LSC_SHIFT)
> +#define MPIC_PIS GENMASK(2, 0)
> +#define MPIC_PIS_GMII 2
> +#define MPIC_PIS_XGMII 4
> +#define MPIC_LSC GENMASK(5, 3)
> +#define MPIC_LSC_100M 1
> +#define MPIC_LSC_1G 2
> +#define MPIC_LSC_2_5G 3
>
> #define MDIO_READ_C45 0x03
> #define MDIO_WRITE_C45 0x01
> --
> 2.39.5
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH net v2] net: renesas: rswitch: fix initial MPIC register setting
2024-12-11 5:30 [PATCH net v2] net: renesas: rswitch: fix initial MPIC register setting Nikita Yushchenko
2024-12-11 6:15 ` Michal Swiatkowski
@ 2024-12-12 14:40 ` patchwork-bot+netdevbpf
1 sibling, 0 replies; 3+ messages in thread
From: patchwork-bot+netdevbpf @ 2024-12-12 14:40 UTC (permalink / raw)
To: Nikita Yushchenko
Cc: yoshihiro.shimoda.uh, andrew, davem, edumazet, kuba, pabeni,
geert+renesas, netdev, linux-renesas-soc, linux-kernel,
michael.dege, christian.mardmoeller, dennis.ostermann
Hello:
This patch was applied to netdev/net.git (main)
by Paolo Abeni <pabeni@redhat.com>:
On Wed, 11 Dec 2024 10:30:12 +0500 you wrote:
> MPIC.PIS must be set per phy interface type.
> MPIC.LSC must be set per speed.
>
> Do that strictly per datasheet, instead of hardcoding MPIC.PIS to GMII.
>
> Fixes: 3590918b5d07 ("net: ethernet: renesas: Add support for "Ethernet Switch"")
> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
>
> [...]
Here is the summary with links:
- [net,v2] net: renesas: rswitch: fix initial MPIC register setting
https://git.kernel.org/netdev/net/c/fb9e6039c325
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-12-11 5:30 [PATCH net v2] net: renesas: rswitch: fix initial MPIC register setting Nikita Yushchenko
2024-12-11 6:15 ` Michal Swiatkowski
2024-12-12 14:40 ` patchwork-bot+netdevbpf
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