From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C49AB1CAA87; Sun, 2 Mar 2025 21:50:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740952213; cv=none; b=WTxIMVfg+UBi/EMCK7pXNdASCXZMw0xM+1+RtmwrL79BAAQGZqx7Wgdzt6RbxANi/GcKaLR5FJDakWUXpCxS7bgrjC784ZRWP65c+VoKsuXLJO4+kEgZOqj6yABtYSi9d7F6/a07GaUIHKFYiK+Bnz2Id3eAuaQ7XebFetCIr4Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740952213; c=relaxed/simple; bh=qVAn8wHXyBURJZAopkHnyWHpVWjzGfEMPF0cu1CZUvU=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=FNVrmbp3zhMpjxqhq64wXallCSzk6npbt/ZrKkaFcisrhAQUR5lktqJPA+MfYvLICkdUyPty9PWW+Q/cA72UV0/4OW+A2V1xwF+1w/4q64H9LWufGoymPzOsXSvkFNtnJTwyL4wYVZY9kvRiLzfbbNoshOv/W8nIICdHYVGGt9g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=HhVYBK9t; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="HhVYBK9t" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Sender:In-Reply-To: Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=6fyHBuEJjVkSvvpwe5epNG1Hltrzkrd+FB0MoDTMTkw=; b=HhVYBK9tUzSihn3ql2rdLNstyO w1ectV4GYiKWakjlCXoo++Ft0Ybc5iFNPZ9yuqPb0cN1mbxSG0kwoJaJHCs8SiHuZCVMQGRcDKe9R JXZxl8UJSQYPaJVGwgsUs/SxLVZ4Mal+pXTSCEpXz2sSEID4Sbs53s59ixXxnS4mbpSx5bOL19Z1n EryuzjPsMAesNdRB7YnkWOE5I5SjhP1f8nlZ0cVMcJ5z/iyx00nytTFtYigz0NWOJe0HtDr2+w0sP 3oscSp1ll5YOxEo1LLOljcVF3Sal4kdFUCfQpxMG5wZUY9EAZj3OrqQKocNouiz0RqQDzn6FqKaYc eok1KMgA==; Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:55890) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1torCA-0007Jj-1s; Sun, 02 Mar 2025 21:49:58 +0000 Received: from linux by shell.armlinux.org.uk with local (Exim 4.96) (envelope-from ) id 1torC7-00037l-0n; Sun, 02 Mar 2025 21:49:55 +0000 Date: Sun, 2 Mar 2025 21:49:55 +0000 From: "Russell King (Oracle)" To: "Lad, Prabhakar" Cc: Andrew Lunn , Geert Uytterhoeven , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Giuseppe Cavallaro , Jose Abreu , Alexandre Torgue , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das , Fabrizio Castro , Lad Prabhakar Subject: Re: [PATCH 2/3] dt-bindings: net: Document GBETH bindings for Renesas RZ/V2H(P) SoC Message-ID: References: <20250302181808.728734-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20250302181808.728734-3-prabhakar.mahadev-lad.rj@bp.renesas.com> <86f41f06-d544-42f5-b2c0-6c4a76ad9eac@lunn.ch> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Sender: Russell King (Oracle) On Sun, Mar 02, 2025 at 09:43:47PM +0000, Lad, Prabhakar wrote: > On Sun, Mar 2, 2025 at 9:39 PM Andrew Lunn wrote: > > > > Your SoC designer really implemented the 0° and 180° as two separate > > > > independently controllable clocks? > > > > > > > Yes there are separate bits to turn ON/OFF the 0° and 180° clocks. > > > > Do you know what the clock tree actually looks like? I can think of > > two different ways this could be implemented: > > > > ----+----------on/off--- > > | > > +----not---on/off--- > > > > or > > > > -------on/off-+------------------ > > | > > +---not---on/off--- > > > > In the first, the clocks are siblings. In the second there is > > parent/child relationship. > > > It's the first case in this SoC. Umm, okay. I'll just pick my jaw up off the floor. :D Given that, then yes, go with your existing clock binding, because that's the most sensible. However, what would be useful for future maintenance is to put some commentry at the top of the new glue file describing this (pictorially) so that when someone looks at this later we know why it is this way. It'll be useful information if someone else does the same because then we can say "hey, we already have a binding for this situation!" -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!