From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Jose Abreu <joabreu@synopsys.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 3/3] net: stmmac: Add DWMAC glue layer for Renesas GBETH
Date: Mon, 3 Mar 2025 10:58:10 +0000 [thread overview]
Message-ID: <Z8WLQrmsi3ZbiQf1@shell.armlinux.org.uk> (raw)
In-Reply-To: <Z8V9OC_1llF3leZd@shell.armlinux.org.uk>
On Mon, Mar 03, 2025 at 09:58:16AM +0000, Russell King (Oracle) wrote:
> I think that the way forward would be to introduce yet another flag
> (maybe STMMAC_FLAG_LPI_TX_CLK_PHY_CAP) and:
>
> if (priv->plat->flags & STMMAC_FLAG_LPI_TX_CLK_PHY_CAP)
> priv->tx_lpi_clk_stop = tx_clk_stop;
> else
> priv->tx_lpi_clk_stop = priv->plat->flags &
> STMMAC_FLAG_EN_TX_LPI_CLOCKGATING;
>
> and then where STMMAC_FLAG_EN_TX_LPI_CLOCKGATING is checked, that
> becomes:
>
> ret = stmmac_set_lpi_mode(priv, priv->hw, STMMAC_LPI_TIMER,
> priv->tx_lpi_clk_stop,
> priv->tx_lpi_timer);
I'm thinking something like the following:
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 3a00a988cb36..04197496ee87 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -307,6 +307,7 @@ struct stmmac_priv {
struct timer_list eee_ctrl_timer;
int lpi_irq;
u32 tx_lpi_timer;
+ bool tx_lpi_clk_stop;
bool eee_enabled;
bool eee_active;
bool eee_sw_timer_en;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 7d10e58e009e..7709d431e950 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -461,8 +461,7 @@ static void stmmac_try_to_start_sw_lpi(struct stmmac_priv *priv)
/* Check and enter in LPI mode */
if (!priv->tx_path_in_lpi_mode)
stmmac_set_lpi_mode(priv, priv->hw, STMMAC_LPI_FORCED,
- priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLOCKGATING,
- 0);
+ priv->tx_lpi_clk_stop, 0);
}
/**
@@ -1110,13 +1109,18 @@ static int stmmac_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,
priv->eee_enabled = true;
+ /* Update the transmit clock stop according to PHY capability if
+ * the platform allows
+ */
+ if (priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP)
+ priv->tx_lpi_clk_stop = tx_clk_stop;
+
stmmac_set_eee_timer(priv, priv->hw, STMMAC_DEFAULT_LIT_LS,
STMMAC_DEFAULT_TWT_LS);
/* Try to cnfigure the hardware timer. */
ret = stmmac_set_lpi_mode(priv, priv->hw, STMMAC_LPI_TIMER,
- priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLOCKGATING,
- priv->tx_lpi_timer);
+ priv->tx_lpi_clk_stop, priv->tx_lpi_timer);
if (ret) {
/* Hardware timer mode not supported, or value out of range.
@@ -1262,6 +1266,10 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
if (!(priv->plat->flags & STMMAC_FLAG_RX_CLK_RUNS_IN_LPI))
priv->phylink_config.eee_rx_clk_stop_enable = true;
+ /* Set the default transmit clock stop bit based on the platform glue */
+ priv->tx_lpi_clk_stop = priv->plat->flags &
+ STMMAC_FLAG_EN_TX_LPI_CLOCKGATING;
+
mdio_bus_data = priv->plat->mdio_bus_data;
if (mdio_bus_data)
priv->phylink_config.default_an_inband =
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index cd0d1383df87..102de1aeac17 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -183,7 +183,8 @@ struct dwmac4_addrs {
#define STMMAC_FLAG_INT_SNAPSHOT_EN BIT(9)
#define STMMAC_FLAG_RX_CLK_RUNS_IN_LPI BIT(10)
#define STMMAC_FLAG_EN_TX_LPI_CLOCKGATING BIT(11)
-#define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY BIT(12)
+#define STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP BIT(12)
+#define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY BIT(13)
struct plat_stmmacenet_data {
int bus_id;
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2025-03-03 10:58 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-02 18:18 [PATCH 0/3] Add GBETH glue layer driver for Renesas RZ/V2H(P) SoC Prabhakar
2025-03-02 18:18 ` [PATCH 1/3] dt-bindings: net: dwmac: Increase 'maxItems' for 'interrupts' and 'interrupt-names' Prabhakar
2025-03-03 15:26 ` Rob Herring
2025-03-03 15:58 ` Lad, Prabhakar
2025-03-03 16:34 ` Andrew Lunn
2025-03-03 20:40 ` Lad, Prabhakar
2025-03-02 18:18 ` [PATCH 2/3] dt-bindings: net: Document GBETH bindings for Renesas RZ/V2H(P) SoC Prabhakar
2025-03-02 19:10 ` Andrew Lunn
2025-03-02 19:28 ` Russell King (Oracle)
2025-03-02 21:33 ` Andrew Lunn
2025-03-03 15:15 ` Rob Herring
2025-03-02 19:25 ` Andrew Lunn
2025-03-02 20:41 ` Lad, Prabhakar
2025-03-02 21:01 ` Russell King (Oracle)
2025-03-02 21:22 ` Lad, Prabhakar
2025-03-02 21:39 ` Andrew Lunn
2025-03-02 21:43 ` Lad, Prabhakar
2025-03-02 21:49 ` Russell King (Oracle)
2025-03-02 21:51 ` Russell King (Oracle)
2025-03-02 22:03 ` Lad, Prabhakar
2025-03-02 18:18 ` [PATCH 3/3] net: stmmac: Add DWMAC glue layer for Renesas GBETH Prabhakar
2025-03-02 19:33 ` Russell King (Oracle)
2025-03-02 20:05 ` Russell King (Oracle)
2025-03-02 21:20 ` Lad, Prabhakar
2025-03-02 21:44 ` Russell King (Oracle)
2025-03-02 22:02 ` Lad, Prabhakar
2025-03-03 11:19 ` Russell King (Oracle)
2025-03-03 16:04 ` Lad, Prabhakar
2025-03-03 16:32 ` Russell King (Oracle)
2025-03-05 21:26 ` Lad, Prabhakar
2025-03-06 0:31 ` Russell King (Oracle)
2025-03-08 13:20 ` Lad, Prabhakar
2025-03-04 6:58 ` Biju Das
2025-03-04 10:00 ` Russell King (Oracle)
2025-03-04 10:56 ` Biju Das
2025-03-04 11:16 ` Russell King (Oracle)
2025-03-04 14:04 ` Geert Uytterhoeven
2025-03-03 9:41 ` Lad, Prabhakar
2025-03-03 9:58 ` Russell King (Oracle)
2025-03-03 10:58 ` Russell King (Oracle) [this message]
2025-03-03 10:40 ` Geert Uytterhoeven
2025-03-03 10:44 ` Lad, Prabhakar
2025-03-03 10:54 ` Russell King (Oracle)
2025-03-06 13:11 ` Geert Uytterhoeven
2025-03-08 12:44 ` Lad, Prabhakar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Z8WLQrmsi3ZbiQf1@shell.armlinux.org.uk \
--to=linux@armlinux.org.uk \
--cc=alexandre.torgue@foss.st.com \
--cc=andrew+netdev@lunn.ch \
--cc=biju.das.jz@bp.renesas.com \
--cc=conor+dt@kernel.org \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=edumazet@google.com \
--cc=fabrizio.castro.jz@renesas.com \
--cc=geert+renesas@glider.be \
--cc=joabreu@synopsys.com \
--cc=krzk+dt@kernel.org \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=pabeni@redhat.com \
--cc=peppe.cavallaro@st.com \
--cc=prabhakar.csengg@gmail.com \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).