Re: [Intel-wired-lan] [PATCH net-next 07/15] idpf: configure resources for TX queues

[Simon Horman <simon.horman@corigine.com>]

On Wed, Mar 29, 2023 at 07:03:56AM -0700, Pavan Kumar Linga wrote:
> From: Alan Brady <alan.brady@intel.com>
> 
> IDPF supports two queue models i.e. single queue which is a traditional
> queueing model as well as split queue model. In single queue model,
> the same descriptor queue is used by SW to post descriptors to the HW,
> HW to post completed descriptors to SW. In split queue model, "TX Queues"
> are used to pass buffers from SW to HW and "TX Completion Queues"
> are used to post descriptor completions from HW to SW. Device supports
> asymmetric ratio of TX queues to TX completion queues. Considering
> this, queue group mechanism is used i.e. some TX queues are grouped
> together which will be serviced by only one TX completion queue
> per TX queue group.
> 
> Add all the resources required for the TX queues initialization.
> To start with, allocate memory for the TX queue groups, TX queues and
> TX completion queues. Then, allocate the descriptors for both TX and
> TX completion queues, and bookkeeping buffers for TX queues alone.
> Also, allocate queue vectors for the vport and initialize the TX queue
> related fields for each queue vector.
> 
> Initialize the queue parameters such as q_id, q_type and tail register
> offset with the info received from the device control plane (CP).
> Once all the TX queues are configured, send config TX queue virtchnl
> message to the CP with all the TX queue context information.
> 
> Signed-off-by: Alan Brady <alan.brady@intel.com>
> Co-developed-by: Alice Michael <alice.michael@intel.com>
> Signed-off-by: Alice Michael <alice.michael@intel.com>
> Co-developed-by: Joshua Hay <joshua.a.hay@intel.com>
> Signed-off-by: Joshua Hay <joshua.a.hay@intel.com>
> Co-developed-by: Phani Burra <phani.r.burra@intel.com>
> Signed-off-by: Phani Burra <phani.r.burra@intel.com>
> Co-developed-by: Pavan Kumar Linga <pavan.kumar.linga@intel.com>
> Signed-off-by: Pavan Kumar Linga <pavan.kumar.linga@intel.com>
> Reviewed-by: Sridhar Samudrala <sridhar.samudrala@intel.com>

Another spelling nit from me.

...

> diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.h b/drivers/net/ethernet/intel/idpf/idpf_txrx.h

...

> +/* queue associated with a vport */
> +struct idpf_queue {
> +	struct device *dev;		/* Used for DMA mapping */
> +	struct idpf_vport *vport;	/* Backreference to associated vport */
> +	struct idpf_txq_group *txq_grp;
> +	/* bufq: Used as group id, either 0 or 1, on clean bufq uses this
> +	 *       index to determine which group of refill queues to clean.
> +	 *       Bufqs are use in splitq only.
> +	 * txq: Index to map between txq group and hot path Tx ptrs stored in
> +	 *      vport. Used in both singleq/splitq
> +	 */
> +	u16 idx;
> +	/* Used for both queue models single and split. In splitq model relevant
> +	 * only to txq
> +	 */
> +	void __iomem *tail;
> +	/* Used in both singleq and splitq */
> +	struct idpf_tx_buf *tx_buf;
> +	u16 q_type;
> +	/* Queue id(Tx/Tx compl/Rx/Bufq) */
> +	u32 q_id;
> +	u16 desc_count;		/* Number of descriptors */
> +
> +	/* Relevant in both split & single txq & bufq */
> +	u16 next_to_use;
> +	/* In split q model only relevant for tx complq and rxq */
> +	u16 next_to_clean;	/* used in interrupt processing */
> +	/* Used only for Rx. In splitq model only relevant to rxq */
> +	u16 next_to_alloc;
> +	/* Generation bit check stored, as HW flips the bit at Queue end */
> +	DECLARE_BITMAP(flags, __IDPF_Q_FLAGS_NBITS);
> +
> +	/* Used for both queue models single and split. In splitq model relavant
> +	 * only to Tx compl Q and Rx compl Q
> +	 */

s/relavant/relevant/

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