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Fri, 28 Apr 2023 08:47:22 +0000 From: To: CC: , , , , Subject: Re: Help needed: supporting new device with unique register bitfields Thread-Topic: Help needed: supporting new device with unique register bitfields Thread-Index: AQHZea4LvTFt8Pl8xU+Bnj5RA3eqzA== Date: Fri, 28 Apr 2023 08:47:22 +0000 Message-ID: References: <20230424125357.55b50cba@kernel.org> In-Reply-To: <20230424125357.55b50cba@kernel.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=microchip.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: CO6PR11MB5569:EE_|MW3PR11MB4524:EE_ x-ms-office365-filtering-correlation-id: ddb3d628-7a29-407d-66a5-08db47c52f20 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 2/DEXEa7kDLwpH7PX8fPmdgBnpmc94BjBwb+LMNVjV6P3x+L72PtNSraExFxpgAw795LSxXa4JJZJxLpegjjN92mPuaKDXohHAKI6371pYamDnrY+Fie7Zj4Y2pFfhBeRKzK88tqr7ylmf1Ow6E4sLpiKvF49FkteQzDekMuNzqhKV9Qxk2Tq50ztRVXiVd9J9Q0Fe2lnF1ATreiYyUeCnLGOT+jNNmb26Hu8dA5CoM9PAnnWqA3Hw7u9P+Cnk/+H58qyTStd5dc6PCBmclkqxgm9cYAVGb+dzYmxbh4kbdfKQI5pdbI2iIIIxbVBfbsSyd+UtEttnLvggw4UqTBJhmgMrGwkfIoySUitqawjDd5h8KwdPVrGA0+Vcf4DTGovzl8IOPwBYd6KX+tGn2z7EvBOLUtBJ2nGAJU6xSzQnhhoKFmAIWS3Dow+ZJKRuN1vAKKw6VDJpspKIu9zfm3qrP7Z4wHWlT8B6oo0aXOSLS9+6ZQbWFUZbk2mLdrI0rVLsMx3PhgSni7ch/zfNZ6nvlr5uKUVIN5QjrtQh0swHIiuRi7s5REOYrAF+R8VVzs0zatswRlRcdYYG4kPxKq0kfM0l66PaUBbUYmO64JSTd84SnCWNRzaI56r9vEgfXN x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CO6PR11MB5569.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230028)(7916004)(136003)(376002)(366004)(39860400002)(396003)(346002)(451199021)(4326008)(316002)(66556008)(91956017)(6916009)(64756008)(66476007)(186003)(83380400001)(66946007)(76116006)(6486002)(478600001)(54906003)(71200400001)(8676002)(66446008)(122000001)(41300700001)(8936002)(38100700002)(6512007)(5660300002)(26005)(9686003)(38070700005)(6506007)(2906002)(33716001)(86362001);DIR:OUT;SFP:1101; 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charset="us-ascii" Content-ID: <899FAECB22F20343B67B775FE6074221@namprd11.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO6PR11MB5569.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ddb3d628-7a29-407d-66a5-08db47c52f20 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Apr 2023 08:47:22.7497 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: baVQUuZWmaBBlYQAf95lKQbedjlOs7nHHMzA5QRtcA0s+ksFdGUwlg0jAUzMTvPU7JDMVw2m78K+yurMfBrTyBXs0e13ux4lxySCVPDOY3A= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR11MB4524 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Den Mon, Apr 24, 2023 at 12:53:57PM -0700 skrev Jakub Kicinski: > On Sun, 23 Apr 2023 16:19:11 +0800 Feiyang Chen wrote: > > We are hoping to add support for a new device which shares almost > > identical logic with dwmac1000 (dwmac_lib.c, dwmac1000_core.c, and > > dwmac1000_dma.c), but with significant differences in the register > > bitfields (dwmac_dma.h and dwmac1000.h). > >=20 > > We are seeking guidance on the best approach to support this new > > device. Any advice on how to proceed would be greatly appreciated. > >=20 > > Thank you for your time and expertise. >=20 > There's no recipe on how to support devices with different register > layout :( You'll need to find the right balance of (1) indirect calls, > (2) if conditions and (3) static description data that's right for you. >=20 > Static description data (e.g. putting register addresses in a struct > and using the members of that struct rather than #defines) is probably > the best but the least flexible. >=20 > Adding the stmmac maintainers. Hi, I thought I would chip in, as we are facing a similar case as described here. I am working on adding support for a new chip, that shares most of the same logic as Sparx5, yet with differences in register layout. Our approach has basically been what Jakub describes. - We use a macro-based approach for accessing registers (see sparx5_main_regs.h). We have added a layer of indirection, so that any _differences_ between the two chips (offset, count, width etc.) have been moved into respective structs, which is then consulted when accessing registers. This allows us to reuse most of the Sparx5 code. - Any unique chip features or similar are ops'ed out. In a few cases handled by if's. - Additionally, chip-specific constants like port count, buffer sizes etc. are statically described for the driver. I think this has worked out pretty well so far. But again, this is balance, as Jakub said. If the differences are too great, it might not be the best solution for you. /Daniel