[PATCH net-next v3 0/2] Fine-Tune Flow Control and Speed Configurations in Microchip KSZ8xxx DSA Driver

[PATCH net-next v3 0/2] Fine-Tune Flow Control and Speed Configurations in Microchip KSZ8xxx DSA Driver

[Oleksij Rempel]

changes v3:
- remove half duplex flow control configuration
- add comments
- s/stram/stream

changes v2:
- split the patch to upstrean and downstream part
- add comments
- fix downstream register offset
- fix cpu configuration

This patch set focuses on enhancing the configurability of flow
control, speed, and duplex settings in the Microchip KSZ8xxx DSA driver.

The first patch allows more granular control over the CPU port's flow
control, speed, and duplex settings. The second patch introduces a
method for downstream port configurations, primarily concerning flow
control based on duplex mode.

Oleksij Rempel (2):
  net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU
    port configurable
  net: dsa: microchip: ksz8: Add function to configure downstream ports
    for KSZ8xxx

 drivers/net/dsa/microchip/ksz8.h       |   4 +
 drivers/net/dsa/microchip/ksz8795.c    | 131 ++++++++++++++++++++++++-
 drivers/net/dsa/microchip/ksz_common.c |   1 +
 3 files changed, 134 insertions(+), 2 deletions(-)

-- 
2.39.2

[PATCH net-next v3 1/2] net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU port configurable

[Oleksij Rempel]

Allow flow control, speed, and duplex settings on the CPU port to be
configurable. Previously, the speed and duplex relied on default switch
values, which limited flexibility. Additionally, flow control was
hardcoded and only functional in duplex mode. This update enhances the
configurability of these parameters.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 drivers/net/dsa/microchip/ksz8.h       |  4 ++
 drivers/net/dsa/microchip/ksz8795.c    | 51 +++++++++++++++++++++++++-
 drivers/net/dsa/microchip/ksz_common.c |  1 +
 3 files changed, 54 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dsa/microchip/ksz8.h b/drivers/net/dsa/microchip/ksz8.h
index e68465fdf6b9..ec02baca726f 100644
--- a/drivers/net/dsa/microchip/ksz8.h
+++ b/drivers/net/dsa/microchip/ksz8.h
@@ -58,5 +58,9 @@ int ksz8_switch_detect(struct ksz_device *dev);
 int ksz8_switch_init(struct ksz_device *dev);
 void ksz8_switch_exit(struct ksz_device *dev);
 int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu);
+void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port,
+			      unsigned int mode, phy_interface_t interface,
+			      struct phy_device *phydev, int speed, int duplex,
+			      bool tx_pause, bool rx_pause);
 
 #endif
diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c
index f56fca1b1a22..9cfe343d2214 100644
--- a/drivers/net/dsa/microchip/ksz8795.c
+++ b/drivers/net/dsa/microchip/ksz8795.c
@@ -1371,6 +1371,55 @@ void ksz8_config_cpu_port(struct dsa_switch *ds)
 	}
 }
 
+/**
+ * ksz8_upstream_link_up - Configures the CPU/upstream port of the switch.
+ * @dev: The KSZ device instance.
+ * @port: The port number to configure.
+ * @speed: The desired link speed.
+ * @duplex: The desired duplex mode.
+ * @tx_pause: If true, enables transmit pause.
+ * @rx_pause: If true, enables receive pause.
+ *
+ * Description:
+ * The function configures flow control and speed settings for the CPU/upstream
+ * port of the switch based on the desired settings, current duplex mode, and
+ * speed.
+ */
+static void ksz8_upstream_link_up(struct ksz_device *dev, int port, int speed,
+				 int duplex, bool tx_pause, bool rx_pause)
+{
+	u8 ctrl = 0;
+
+	/* SW_FLOW_CTRL, SW_HALF_DUPLEX, and SW_10_MBIT bits are bootstrappable.
+	 * They can have different values depending on your board setup.
+	 */
+	if (duplex) {
+		if (tx_pause || rx_pause)
+			ctrl |= SW_FLOW_CTRL;
+	} else {
+		ctrl |= SW_HALF_DUPLEX;
+	}
+
+	/* This hardware only supports SPEED_10 and SPEED_100. For SPEED_10
+	 * we need to set the SW_10_MBIT bit. Otherwise, we can leave it 0.
+	 */
+	if (speed == SPEED_10)
+		ctrl |= SW_10_MBIT;
+
+	ksz_rmw8(dev, REG_SW_CTRL_4, SW_HALF_DUPLEX | SW_FLOW_CTRL |
+		 SW_10_MBIT, ctrl);
+}
+
+void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port,
+			      unsigned int mode, phy_interface_t interface,
+			      struct phy_device *phydev, int speed, int duplex,
+			      bool tx_pause, bool rx_pause)
+{
+	if (dsa_is_upstream_port(dev->ds, port))
+		ksz8_upstream_link_up(dev, port, speed, duplex, tx_pause,
+				     rx_pause);
+}
+
 static int ksz8_handle_global_errata(struct dsa_switch *ds)
 {
 	struct ksz_device *dev = ds->priv;
@@ -1419,8 +1468,6 @@ int ksz8_setup(struct dsa_switch *ds)
 	 */
 	ds->vlan_filtering_is_global = true;
 
-	ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
-
 	/* Enable automatic fast aging when link changed detected. */
 	ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
 
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
index a4428be5f483..6e19ad70c671 100644
--- a/drivers/net/dsa/microchip/ksz_common.c
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -210,6 +210,7 @@ static const struct ksz_dev_ops ksz8_dev_ops = {
 	.mirror_add = ksz8_port_mirror_add,
 	.mirror_del = ksz8_port_mirror_del,
 	.get_caps = ksz8_get_caps,
+	.phylink_mac_link_up = ksz8_phylink_mac_link_up,
 	.config_cpu_port = ksz8_config_cpu_port,
 	.enable_stp_addr = ksz8_enable_stp_addr,
 	.reset = ksz8_reset_switch,
-- 
2.39.2

[PATCH net-next v3 2/2] net: dsa: microchip: ksz8: Add function to configure downstream ports for KSZ8xxx

[Oleksij Rempel]

This patch introduces the function 'ksz8_downstream_link_up' to the
Microchip KSZ8xxx driver. This function configures the flow control settings
for the downstream ports of the switch based on desired settings and the
current duplex mode.

The KSZ8795 switch, unlike the KSZ8873, supports asynchronous pause control.
However, a single bit controls both RX and TX pause, so we can't enforce
asynchronous pause control. The flow control can be set based on the
auto-negotiation process, depending on the capabilities of both link partners.

For the KSZ8873, the PORT_FORCE_FLOW_CTRL bit can be set by the hardware
bootstrap, ignoring the auto-negotiation result. Therefore, even in
auto-negotiation mode, we need to ensure that the PORT_FORCE_FLOW_CTRL bit is
correctly set.

In the absence of auto-negotiation, we will enforce synchronous pause control
for the KSZ8795 switch.

Note: It is currently not possible to force disable flow control on a port if
we still advertise pause support. This configuration is not currently supported
by Linux, and it may not make practical sense. However, it's essential to
understand this limitation when working with the KSZ8873 and similar devices.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 drivers/net/dsa/microchip/ksz8795.c | 80 +++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c
index 9cfe343d2214..6d7b6a337d1c 100644
--- a/drivers/net/dsa/microchip/ksz8795.c
+++ b/drivers/net/dsa/microchip/ksz8795.c
@@ -1371,6 +1371,84 @@ void ksz8_config_cpu_port(struct dsa_switch *ds)
 	}
 }
 
+/**
+ * ksz8_downstream_link_up - Configures the downstream port of the switch.
+ * @dev: The KSZ device instance.
+ * @port: The port number to configure.
+ * @duplex: The desired duplex mode.
+ * @tx_pause: If true, enables transmit pause.
+ * @rx_pause: If true, enables receive pause.
+ *
+ * Description:
+ * The function configures flow control settings for a given port based on the
+ * desired settings and current duplex mode.
+ *
+ * According to the KSZ8873 datasheet, the PORT_FORCE_FLOW_CTRL bit in the
+ * Port Control 2 register (0x1A for Port 1, 0x22 for Port 2, 0x32 for Port 3)
+ * determines how flow control is handled on the port:
+ *    "1 = will always enable full-duplex flow control on the port, regardless
+ *         of AN result.
+ *     0 = full-duplex flow control is enabled based on AN result."
+ *
+ * This means that the flow control behavior depends on the state of this bit:
+ * - If PORT_FORCE_FLOW_CTRL is set to 1, the switch will ignore AN results and
+ *   force flow control on the port.
+ * - If PORT_FORCE_FLOW_CTRL is set to 0, the switch will enable or disable
+ *   flow control based on the AN results.
+ *
+ * However, there is a potential limitation in this configuration. It is
+ * currently not possible to force disable flow control on a port if we still
+ * advertise pause support. While such a configuration is not currently
+ * supported by Linux, and may not make practical sense, it's important to be
+ * aware of this limitation when working with the KSZ8873 and similar devices.
+ */
+static void ksz8_downstream_link_up(struct ksz_device *dev, int port,
+				   int duplex, bool tx_pause, bool rx_pause)
+{
+	const u16 *regs = dev->info->regs;
+	u8 ctrl = 0;
+	int ret;
+
+	/*
+	 * The KSZ8795 switch differs from the KSZ8873 by supporting
+	 * asynchronous pause control. However, since a single bit is used to
+	 * control both RX and TX pause, we can't enforce asynchronous pause
+	 * control - both TX and RX pause will be either enabled or disabled
+	 * together.
+	 *
+	 * If auto-negotiation is enabled, we usually allow the flow control to
+	 * be determined by the auto-negotiation process based on the
+	 * capabilities of both link partners. However, for KSZ8873, the
+	 * PORT_FORCE_FLOW_CTRL bit may be set by the hardware bootstrap,
+	 * ignoring the auto-negotiation result. Thus, even in auto-negotiatio
+	 * mode, we need to ensure that the PORT_FORCE_FLOW_CTRL bit is
+	 * properly cleared.
+	 *
+	 * In the absence of auto-negotiation, we will enforce synchronous
+	 * pause control for both variants of switches - KSZ8873 and KSZ8795.
+	 */
+	if (duplex) {
+		bool aneg_en = false;
+
+		ret = ksz_pread8(dev, port, regs[P_FORCE_CTRL], &ctrl);
+		if (ret)
+			return;
+
+		if (ksz_is_ksz88x3(dev)) {
+			if ((ctrl & PORT_AUTO_NEG_ENABLE))
+				aneg_en = true;
+		} else {
+			if (!(ctrl & PORT_AUTO_NEG_DISABLE))
+				aneg_en = true;
+		}
+
+		if (!aneg_en && (tx_pause || rx_pause))
+			ctrl |= PORT_FORCE_FLOW_CTRL;
+	}
+
+	ksz_prmw8(dev, port, regs[P_STP_CTRL], PORT_FORCE_FLOW_CTRL, ctrl);
+}
+
 /**
  * ksz8_upstream_link_up - Configures the CPU/upstream port of the switch.
  * @dev: The KSZ device instance.
@@ -1418,6 +1496,8 @@ void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port,
 	if (dsa_is_upstream_port(dev->ds, port))
 		ksz8_upstream_link_up(dev, port, speed, duplex, tx_pause,
 				     rx_pause);
+	else
+		ksz8_downstream_link_up(dev, port, duplex, tx_pause, rx_pause);
 }
 
 static int ksz8_handle_global_errata(struct dsa_switch *ds)
-- 
2.39.2

Re: [PATCH net-next v3 0/2] Fine-Tune Flow Control and Speed Configurations in Microchip KSZ8xxx DSA Driver

[Marc Kleine-Budde]

[-- Attachment #1: Type: text/plain, Size: 1023 bytes --]

On 18.05.2023 11:29:11, Oleksij Rempel wrote:
> changes v3:
> - remove half duplex flow control configuration
> - add comments
> - s/stram/stream
> 
> changes v2:
> - split the patch to upstrean and downstream part
                              ^m
> - add comments
> - fix downstream register offset
> - fix cpu configuration
> 
> This patch set focuses on enhancing the configurability of flow
> control, speed, and duplex settings in the Microchip KSZ8xxx DSA driver.
> 
> The first patch allows more granular control over the CPU port's flow
> control, speed, and duplex settings. The second patch introduces a
> method for downstream port configurations, primarily concerning flow
> control based on duplex mode.

regards,
Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde          |
Embedded Linux                   | https://www.pengutronix.de |
Vertretung Nürnberg              | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-9   |

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

Re: [PATCH net-next v3 1/2] net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU port configurable

[Simon Horman]

On Thu, May 18, 2023 at 11:29:12AM +0200, Oleksij Rempel wrote:
> Allow flow control, speed, and duplex settings on the CPU port to be
> configurable. Previously, the speed and duplex relied on default switch
> values, which limited flexibility. Additionally, flow control was
> hardcoded and only functional in duplex mode. This update enhances the
> configurability of these parameters.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Simon Horman <simon.horman@corigine.com>

...

> diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c
> index f56fca1b1a22..9cfe343d2214 100644
> --- a/drivers/net/dsa/microchip/ksz8795.c
> +++ b/drivers/net/dsa/microchip/ksz8795.c
> @@ -1371,6 +1371,55 @@ void ksz8_config_cpu_port(struct dsa_switch *ds)
>  	}
>  }
>  
> +/**
> + * ksz8_upstream_link_up - Configures the CPU/upstream port of the switch.
> + * @dev: The KSZ device instance.
> + * @port: The port number to configure.
> + * @speed: The desired link speed.
> + * @duplex: The desired duplex mode.
> + * @tx_pause: If true, enables transmit pause.
> + * @rx_pause: If true, enables receive pause.
> + *
> + * Description:
> + * The function configures flow control and speed settings for the CPU/upstream
> + * port of the switch based on the desired settings, current duplex mode, and
> + * speed.
> + */
> +static void ksz8_upstream_link_up(struct ksz_device *dev, int port, int speed,
+				 int duplex, bool tx_pause, bool rx_pause)

nit: there seems to be an off-by-one error in the indentation of the line
     above.

...

Re: [PATCH net-next v3 2/2] net: dsa: microchip: ksz8: Add function to configure downstream ports for KSZ8xxx

[Simon Horman]

On Thu, May 18, 2023 at 11:29:13AM +0200, Oleksij Rempel wrote:
> This patch introduces the function 'ksz8_downstream_link_up' to the
> Microchip KSZ8xxx driver. This function configures the flow control settings
> for the downstream ports of the switch based on desired settings and the
> current duplex mode.
> 
> The KSZ8795 switch, unlike the KSZ8873, supports asynchronous pause control.
> However, a single bit controls both RX and TX pause, so we can't enforce
> asynchronous pause control. The flow control can be set based on the
> auto-negotiation process, depending on the capabilities of both link partners.
> 
> For the KSZ8873, the PORT_FORCE_FLOW_CTRL bit can be set by the hardware
> bootstrap, ignoring the auto-negotiation result. Therefore, even in
> auto-negotiation mode, we need to ensure that the PORT_FORCE_FLOW_CTRL bit is
> correctly set.
> 
> In the absence of auto-negotiation, we will enforce synchronous pause control
> for the KSZ8795 switch.
> 
> Note: It is currently not possible to force disable flow control on a port if
> we still advertise pause support. This configuration is not currently supported
> by Linux, and it may not make practical sense. However, it's essential to
> understand this limitation when working with the KSZ8873 and similar devices.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Simon Horman <simon.horman@corigine.com>

> +static void ksz8_downstream_link_up(struct ksz_device *dev, int port,
> +				   int duplex, bool tx_pause, bool rx_pause)
> +{
> +	const u16 *regs = dev->info->regs;
> +	u8 ctrl = 0;
> +	int ret;
> +
> +	/*
> +	 * The KSZ8795 switch differs from the KSZ8873 by supporting
> +	 * asynchronous pause control. However, since a single bit is used to
> +	 * control both RX and TX pause, we can't enforce asynchronous pause
> +	 * control - both TX and RX pause will be either enabled or disabled
> +	 * together.
> +	 *
> +	 * If auto-negotiation is enabled, we usually allow the flow control to
> +	 * be determined by the auto-negotiation process based on the
> +	 * capabilities of both link partners. However, for KSZ8873, the
> +	 * PORT_FORCE_FLOW_CTRL bit may be set by the hardware bootstrap,
> +	 * ignoring the auto-negotiation result. Thus, even in auto-negotiatio
> +	 * mode, we need to ensure that the PORT_FORCE_FLOW_CTRL bit is
> +	 * properly cleared.
> +	 *
> +	 * In the absence of auto-negotiation, we will enforce synchronous
> +	 * pause control for both variants of switches - KSZ8873 and KSZ8795.
> +	 */

nit: multi-line comments in networking code are like this:

	/* This is
	 * a wrap.
	 */

...

Re: [PATCH net-next v3 1/2] net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU port configurable

[Vladimir Oltean]

Hi Oleksij,

On Thu, May 18, 2023 at 11:29:12AM +0200, Oleksij Rempel wrote:
> +void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port,
> +			      unsigned int mode, phy_interface_t interface,
> +			      struct phy_device *phydev, int speed, int duplex,
> +			      bool tx_pause, bool rx_pause)
> +{
> +	if (dsa_is_upstream_port(dev->ds, port))
> +		ksz8_upstream_link_up(dev, port, speed, duplex, tx_pause,
> +				     rx_pause);
> +}

Can we make phylink control independent of DSA switch tree topology please?
Whether the port goes towards the host or not has no saying in whether
it is an xMII port. DSA's phylink integration makes it possible to
connect the CPU port to the host SoC through a PHY + RJ45 cable, case in
which the xMII port could be used as a user port.