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[151.236.202.107]) by smtp.gmail.com with ESMTPSA id z4-20020a05651c022400b002aa3cff0529sm586897ljn.74.2023.05.26.00.14.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 May 2023 00:14:27 -0700 (PDT) Date: Fri, 26 May 2023 09:14:26 +0200 From: =?iso-8859-1?Q?Ram=F3n?= Nordin Rodriguez To: Parthiban.Veerasooran@microchip.com Cc: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Horatiu.Vultur@microchip.com, Woojung.Huh@microchip.com, Nicolas.Ferre@microchip.com, Thorsten.Kummermehr@microchip.com Subject: Re: [PATCH net-next v3 4/6] net: phy: microchip_t1s: fix reset complete status handling Message-ID: References: <20230524144539.62618-1-Parthiban.Veerasooran@microchip.com> <20230524144539.62618-5-Parthiban.Veerasooran@microchip.com> <8a46450d-7c6e-68a4-c09d-3b195a935907@microchip.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8a46450d-7c6e-68a4-c09d-3b195a935907@microchip.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE, T_SPF_PERMERROR autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On Fri, May 26, 2023 at 06:00:08AM +0000, Parthiban.Veerasooran@microchip.com wrote: > Hi Ramon, > >> + /* Read STS2 register and check for the Reset Complete status to do the > >> + * init configuration. If the Reset Complete is not set, wait for 5us > >> + * and then read STS2 register again and check for Reset Complete status. > >> + * Still if it is failed then declare PHY reset error or else proceed > >> + * for the PHY initial register configuration. > >> + */ > > > > This comment explains exactly what the code does, which is also obvious > > from reading the code. A meaningful comment would be explaining why the > > state can change 5us later. > > > As per design, LAN867x reset to be completed by 3us. Just for a safer > side it is recommended to use 5us. With the assumption of more than 3us > completion, the first read checks for the Reset Complete. If the > config_init is more faster, then once again checks for it after 5us. > > As you mentioned, can we remove the existing block comment as it > explains the code and add the above comment to explain 5us delay. > What is your opinion on this proposal? > > Best Regards, > Parthiban V > I'd suggest the following /*The chip completes a reset in 3us, we might get here earlier than that, as an added margin we'll conditionally sleep 5us*/