From: Simon Horman <simon.horman@corigine.com>
To: Michal Smulski <msmulski2@gmail.com>
Cc: andrew@lunn.ch, f.fainelli@gmail.com, olteanv@gmail.com,
netdev@vger.kernel.org, Michal Smulski <michal.smulski@ooma.com>
Subject: Re: [PATCH net-next] net: dsa: mv88e6xxx: implement USXGMII mode for mv88e6393x
Date: Sat, 27 May 2023 15:28:33 +0200 [thread overview]
Message-ID: <ZHIFgcxgh2quGxZj@corigine.com> (raw)
In-Reply-To: <20230527002144.8109-1-michal.smulski@ooma.com>
On Fri, May 26, 2023 at 05:21:44PM -0700, Michal Smulski wrote:
> Enable USXGMII mode for mv88e6393x chips. Tested on Marvell 88E6191X.
>
> Signed-off-by: Michal Smulski <michal.smulski@ooma.com>
...
> @@ -1477,7 +1481,8 @@ static int mv88e6393x_serdes_erratum_5_2(struct mv88e6xxx_chip *chip, int lane,
> * to SERDES operating in 10G mode. These registers only apply to 10G
> * operation and have no effect on other speeds.
> */
> - if (cmode != MV88E6393X_PORT_STS_CMODE_10GBASER)
> + if (cmode != MV88E6393X_PORT_STS_CMODE_10GBASER ||
> + cmode != MV88E6393X_PORT_STS_CMODE_USXGMII)
Perhaps naïvely, this seems like it will always be true.
Should it be:
if (cmode != MV88E6393X_PORT_STS_CMODE_10GBASER &&
cmode != MV88E6393X_PORT_STS_CMODE_USXGMII)
next prev parent reply other threads:[~2023-05-27 13:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-27 0:21 [PATCH net-next] net: dsa: mv88e6xxx: implement USXGMII mode for mv88e6393x Michal Smulski
2023-05-27 13:28 ` Simon Horman [this message]
2023-05-27 16:08 ` Michal Smulski
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