QUSGMII control word

["Russell King (Oracle)" <linux@armlinux.org.uk>]

Hi Maxime,

Looking at your commit which introduced QUSGMII -
5e61fe157a27 ("net: phy: Introduce QUSGMII PHY mode"), are you sure
your decoding of the control word is correct?

I've found some information online which suggests that QUSGMII uses a
slightly different format to the control word from SGMII. Most of the
bits are the same, but the speed bits occupy the three bits from 11:9,
and 10M, 100M and 1G are encoded using bits 10:9, whereas in SGMII
they are bits 11:10. In other words, in QUSGMII they are shifted one
bit down. In your commit, you used the SGMII decoder for QUSGMII,
which would mean we'd be picking out the wrong bits for decoding the
speed.

QUSGMII also introduces EEE information into bits 8 and 7 whereas
these are reserved in SGMII.

Please could you take a look, because I think we need a different
decoder for the QUSGMII speed bits.

Thanks.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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