From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Revanth Kumar Uppala <ruppala@nvidia.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
"hkallweit1@gmail.com" <hkallweit1@gmail.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
Narayan Reddy <narayanr@nvidia.com>
Subject: Re: [PATCH 2/4] net: phy: aquantia: Enable MAC Controlled EEE
Date: Mon, 24 Jul 2023 12:52:03 +0100 [thread overview]
Message-ID: <ZL5l44e5cdODvwna@shell.armlinux.org.uk> (raw)
In-Reply-To: <BL3PR12MB64504E1E36E01EF76ADB3946C302A@BL3PR12MB6450.namprd12.prod.outlook.com>
On Mon, Jul 24, 2023 at 11:29:28AM +0000, Revanth Kumar Uppala wrote:
> > Ideally, you should only do SmartEEE, if the SoC MAC is dumb and does not have
> > EEE itself. I guess if you are doing rate adaptation, or MACSEC in the PHY, then
> > you might be forced to use SmartEEE since the SoC MAC is somewhat decoupled
> > from the PHY.
> >
> > At the moment, we don't have a good story for SmartEEE. It should be
> > configured in the same way as normal EEE, ethtool --set-eee etc. I've got a
> > rewrite of normal EEE in the works. Once that is merged i hope SmartEEE will be
> > next.
> "ethtool --set-eee" is a dynamic way of enabling normal EEE and here we are doing the same normal EEE but configuring it by default in aqr107_config_init() instead of doing it dynamically.
So, setting the MAC_CNTRL_EEE bits is just enabling the standard IEEE
paths in the PHY to allow the IEEE defined EEE architecture to work?
If that's all its doing, I wonder why they aren't set by default...
seems rather strange.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
prev parent reply other threads:[~2023-07-24 11:52 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230628124326.55732-1-ruppala@nvidia.com>
2023-06-28 13:30 ` [PATCH 1/4] net: phy: aquantia: Enable Tx/Rx pause frame support in aquantia PHY Russell King (Oracle)
[not found] ` <ce4c10b5-c2cf-489d-b096-19b5bcd8c49e@lunn.ch>
2023-07-24 11:29 ` Revanth Kumar Uppala
2023-07-24 11:47 ` Russell King (Oracle)
[not found] ` <20230628124326.55732-3-ruppala@nvidia.com>
2023-06-28 13:33 ` [PATCH 3/4] net: phy: aquantia: Poll for TX ready at PHY system side Russell King (Oracle)
2023-07-24 11:29 ` Revanth Kumar Uppala
2023-07-24 11:57 ` Russell King (Oracle)
2024-07-19 13:27 ` Jon Hunter
2024-07-29 10:47 ` Russell King (Oracle)
2024-07-30 9:36 ` Jon Hunter
2024-07-30 9:41 ` Russell King (Oracle)
2024-07-30 10:02 ` Jon Hunter
2024-07-30 11:12 ` Russell King (Oracle)
2024-07-30 12:25 ` Jon Hunter
2024-09-24 10:33 ` Jon Hunter
[not found] ` <20230628124326.55732-4-ruppala@nvidia.com>
2023-06-28 13:43 ` [PATCH 4/4] net: phy: aqr113c: Enable Wake-on-LAN (WOL) Russell King (Oracle)
2023-07-24 11:29 ` Revanth Kumar Uppala
2023-07-24 12:29 ` Russell King (Oracle)
[not found] ` <c1aedb1e-e750-40ce-a19a-dfb21e2a971f@lunn.ch>
2023-07-24 11:30 ` Revanth Kumar Uppala
2023-06-28 13:46 ` [PATCH 1/4] net: phy: aquantia: Enable Tx/Rx pause frame support in aquantia PHY Russell King (Oracle)
[not found] ` <20230628124326.55732-2-ruppala@nvidia.com>
[not found] ` <57493101-413c-4f68-a064-f25e75fc2783@lunn.ch>
2023-07-24 11:29 ` [PATCH 2/4] net: phy: aquantia: Enable MAC Controlled EEE Revanth Kumar Uppala
2023-07-24 11:52 ` Russell King (Oracle) [this message]
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