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Date: Sat, 29 Jul 2023 13:01:32 +0200
From: Simon Horman <horms@kernel.org>
To: Lukasz Majewski <lukma@denx.de>
Cc: Woojung Huh <woojung.huh@microchip.com>, UNGLinuxDriver@microchip.com,
	Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Vladimir Oltean <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	Rasmus Villemoes <linux@rasmusvillemoes.dk>
Subject: Re: [PATCH] net: dsa: microchip: KSZ9477 register regmap alignment
 to 32 bit boundaries
Message-ID: <ZMTxjP5dReD6+B3P@kernel.org>
References: <20230727081342.3828601-1-lukma@denx.de>
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In-Reply-To: <20230727081342.3828601-1-lukma@denx.de>

On Thu, Jul 27, 2023 at 10:13:42AM +0200, Lukasz Majewski wrote:
> The commit (SHA1: 5c844d57aa7894154e49cf2fc648bfe2f1aefc1c) provided code
> to apply "Module 6: Certain PHY registers must be written as pairs instead
> of singly" errata for KSZ9477 as this chip for certain PHY registers
> (0xN120 to 0xN13F, N=1,2,3,4,5) must be accesses as 32 bit words instead
> of 16 or 8 bit access.
> Otherwise, adjacent registers (no matter if reserved or not) are
> overwritten with 0x0.
> 
> Without this patch some registers (e.g. 0x113c or 0x1134) required for 32
> bit access are out of valid regmap ranges.
> 
> As a result, following error is observed and KSZ9477 is not properly
> configured:
> 
> ksz-switch spi1.0: can't rmw 32bit reg 0x113c: -EIO
> ksz-switch spi1.0: can't rmw 32bit reg 0x1134: -EIO
> ksz-switch spi1.0 lan1 (uninitialized): failed to connect to PHY: -EIO
> ksz-switch spi1.0 lan1 (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 0
> 
> 
> The solution is to modify regmap_reg_range to allow accesses with 4 bytes
> boundaries.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>

Reviewed-by: Simon Horman <horms@kernel.org>