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Date: Thu, 17 Aug 2023 09:37:18 -0700
From: Saeed Mahameed <saeed@kernel.org>
To: Jakub Kicinski <kuba@kernel.org>
Cc: Saeed Mahameed <saeedm@nvidia.com>, Vadim Fedorenko <vadfed@meta.com>,
	Rahul Rameshbabu <rrameshbabu@nvidia.com>,
	Gal Pressman <gal@nvidia.com>, Bar Shapira <bshapira@nvidia.com>,
	Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	Richard Cochran <richardcochran@gmail.com>, netdev@vger.kernel.org
Subject: Re: [PATCH net] Revert "net/mlx5: Update cyclecounter shift value to
 improve ptp free running mode precision"
Message-ID: <ZN5Mvh9c+joFcJbb@x130>
References: <20230815151507.3028503-1-vadfed@meta.com>
 <20230816193822.1a0c2b0c@kernel.org>
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On 16 Aug 19:38, Jakub Kicinski wrote:
>On Tue, 15 Aug 2023 08:15:07 -0700 Vadim Fedorenko wrote:
>> From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
>>
>> This reverts commit 6a40109275626267ebf413ceda81c64719b5c431.
>>
>> There was an assumption in the original commit that all the devices
>> supported by mlx5 advertise 1GHz as an internal timer frequency.
>> Apparently at least ConnectX-4 Lx (MCX4431N-GCAN) provides 156.250Mhz
>> as an internal frequency and the original commit breaks PTP
>> synchronization on these cards.
>
>Hi Saeed, any preference here? Given we're past -rc6 and the small
>size of the revert it seems like a tempting solution?

Rahul's solution is also very small and already passed review, we will be
conducting some tests, share the patch with Vadim for testing and I will be
submitting it early next week.

>