* [PATCH net-next] net: dsa: mv88e6060: add phylink_get_caps implementation
@ 2023-08-09 12:32 Russell King (Oracle)
2023-08-09 13:45 ` Andrew Lunn
2023-08-09 14:19 ` kernel test robot
0 siblings, 2 replies; 4+ messages in thread
From: Russell King (Oracle) @ 2023-08-09 12:32 UTC (permalink / raw)
To: Andrew Lunn, Heiner Kallweit
Cc: Florian Fainelli, Vladimir Oltean, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, netdev
Add a phylink_get_caps implementation for Marvell 88e6060 DSA switch.
This is a fast ethernet switch, with internal PHYs for ports 0 through
4. Port 4 also supports MII, REVMII, REVRMII and SNI. Port 5 supports
MII, REVMII, REVRMII and SNI without an internal PHY.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
drivers/net/dsa/mv88e6060.c | 46 +++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/net/dsa/mv88e6060.c b/drivers/net/dsa/mv88e6060.c
index fdda62d6eb16..4f3df3a3a1f6 100644
--- a/drivers/net/dsa/mv88e6060.c
+++ b/drivers/net/dsa/mv88e6060.c
@@ -247,11 +247,57 @@ mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
return reg_write(priv, addr, regnum, val);
}
+static void mv88e6060_phylink_get_caps(struct dsa_switch *ds, int port,
+ struct phylink_config *config)
+{
+ unsigned long *interfaces = config->supported_interfaces;
+ struct mv88e6060_priv *priv = ds->priv;
+ int addr = REG_PORT(port);
+ int ret;
+
+ ret = reg_read(priv, addr, PORT_STATUS);
+ if (ret < 0) {
+ dev_err(ds->dev,
+ "port %d: unable to read status register: %pe\n",
+ port, PTR_ERR(ret));
+ return;
+ }
+
+ if (!(ret & PORT_STATUS_PORTMODE)) {
+ /* Port configured in SNI mode (acts as a 10Mbps PHY) */
+ config->mac_capabilities = MAC_10 | MAC_SYM_PAUSE;
+ /* I don't think SNI is SMII - SMII has a sync signal, and
+ * SNI doesn't.
+ */
+ __set_bit(PHY_INTERFACE_MODE_SMII, interfaces);
+ return;
+ }
+
+ config->mac_capabilities = MAC_100 | MAC_10 | MAC_SYM_PAUSE;
+
+ if (port >= 4) {
+ /* Ports 4 and 5 can support MII, REVMII and REVRMII modes */
+ __set_bit(PHY_INTERFACE_MODE_MII, interfaces);
+ __set_bit(PHY_INTERFACE_MODE_REVMII, interfaces);
+ __set_bit(PHY_INTERFACE_MODE_REVRMII, interfaces);
+ }
+ if (port <= 4) {
+ /* Ports 0 to 3 have internal PHYs, and port 4 can optionally
+ * use an internal PHY.
+ */
+ /* Internal PHY */
+ __set_bit(PHY_INTERFACE_MODE_INTERNAL, interfaces);
+ /* Default phylib interface mode */
+ __set_bit(PHY_INTERFACE_MODE_GMII, interfaces);
+ }
+}
+
static const struct dsa_switch_ops mv88e6060_switch_ops = {
.get_tag_protocol = mv88e6060_get_tag_protocol,
.setup = mv88e6060_setup,
.phy_read = mv88e6060_phy_read,
.phy_write = mv88e6060_phy_write,
+ .phylink_get_caps = mv88e6060_phylink_get_caps,
};
static int mv88e6060_probe(struct mdio_device *mdiodev)
--
2.30.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH net-next] net: dsa: mv88e6060: add phylink_get_caps implementation
2023-08-09 12:32 [PATCH net-next] net: dsa: mv88e6060: add phylink_get_caps implementation Russell King (Oracle)
@ 2023-08-09 13:45 ` Andrew Lunn
2023-08-09 13:48 ` Russell King (Oracle)
2023-08-09 14:19 ` kernel test robot
1 sibling, 1 reply; 4+ messages in thread
From: Andrew Lunn @ 2023-08-09 13:45 UTC (permalink / raw)
To: Russell King (Oracle)
Cc: Heiner Kallweit, Florian Fainelli, Vladimir Oltean,
David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
netdev
On Wed, Aug 09, 2023 at 01:32:08PM +0100, Russell King (Oracle) wrote:
> Add a phylink_get_caps implementation for Marvell 88e6060 DSA switch.
> This is a fast ethernet switch, with internal PHYs for ports 0 through
> 4. Port 4 also supports MII, REVMII, REVRMII and SNI. Port 5 supports
> MII, REVMII, REVRMII and SNI without an internal PHY.
>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Looks sensible, and fits with the limited knowledge i have of this
device.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH net-next] net: dsa: mv88e6060: add phylink_get_caps implementation
2023-08-09 13:45 ` Andrew Lunn
@ 2023-08-09 13:48 ` Russell King (Oracle)
0 siblings, 0 replies; 4+ messages in thread
From: Russell King (Oracle) @ 2023-08-09 13:48 UTC (permalink / raw)
To: Andrew Lunn
Cc: Heiner Kallweit, Florian Fainelli, Vladimir Oltean,
David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
netdev
On Wed, Aug 09, 2023 at 03:45:29PM +0200, Andrew Lunn wrote:
> On Wed, Aug 09, 2023 at 01:32:08PM +0100, Russell King (Oracle) wrote:
> > Add a phylink_get_caps implementation for Marvell 88e6060 DSA switch.
> > This is a fast ethernet switch, with internal PHYs for ports 0 through
> > 4. Port 4 also supports MII, REVMII, REVRMII and SNI. Port 5 supports
> > MII, REVMII, REVRMII and SNI without an internal PHY.
> >
> > Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
>
> Looks sensible, and fits with the limited knowledge i have of this
> device.
>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Thanks. I have to change the PTR_ERR to ERR_PTR - I often get those
the wrong way around. :/
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH net-next] net: dsa: mv88e6060: add phylink_get_caps implementation
2023-08-09 12:32 [PATCH net-next] net: dsa: mv88e6060: add phylink_get_caps implementation Russell King (Oracle)
2023-08-09 13:45 ` Andrew Lunn
@ 2023-08-09 14:19 ` kernel test robot
1 sibling, 0 replies; 4+ messages in thread
From: kernel test robot @ 2023-08-09 14:19 UTC (permalink / raw)
To: Russell King (Oracle), Andrew Lunn, Heiner Kallweit
Cc: oe-kbuild-all, Florian Fainelli, Vladimir Oltean, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, netdev
Hi Russell,
kernel test robot noticed the following build warnings:
[auto build test WARNING on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/Russell-King-Oracle/net-dsa-mv88e6060-add-phylink_get_caps-implementation/20230809-203318
base: net-next/main
patch link: https://lore.kernel.org/r/E1qTiMC-003FJP-V3%40rmk-PC.armlinux.org.uk
patch subject: [PATCH net-next] net: dsa: mv88e6060: add phylink_get_caps implementation
config: loongarch-allyesconfig (https://download.01.org/0day-ci/archive/20230809/202308092253.LelgPpOb-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 12.3.0
reproduce: (https://download.01.org/0day-ci/archive/20230809/202308092253.LelgPpOb-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202308092253.LelgPpOb-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from include/linux/device.h:15,
from include/linux/dma-mapping.h:8,
from include/linux/skbuff.h:28,
from include/linux/if_ether.h:19,
from include/linux/etherdevice.h:20,
from drivers/net/dsa/mv88e6060.c:8:
drivers/net/dsa/mv88e6060.c: In function 'mv88e6060_phylink_get_caps':
>> drivers/net/dsa/mv88e6060.c:262:39: warning: passing argument 1 of 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
262 | port, PTR_ERR(ret));
| ^~~
| |
| int
include/linux/dev_printk.h:110:37: note: in definition of macro 'dev_printk_index_wrap'
110 | _p_func(dev, fmt, ##__VA_ARGS__); \
| ^~~~~~~~~~~
drivers/net/dsa/mv88e6060.c:260:17: note: in expansion of macro 'dev_err'
260 | dev_err(ds->dev,
| ^~~~~~~
In file included from include/linux/rwsem.h:17,
from include/linux/mm_types.h:13,
from include/linux/mmzone.h:22,
from include/linux/gfp.h:7,
from include/linux/xarray.h:15,
from include/linux/list_lru.h:14,
from include/linux/fs.h:13,
from include/linux/highmem.h:5,
from include/linux/bvec.h:10,
from include/linux/skbuff.h:17:
include/linux/err.h:49:61: note: expected 'const void *' but argument is of type 'int'
49 | static inline long __must_check PTR_ERR(__force const void *ptr)
| ~~~~~~~~~~~~^~~
>> drivers/net/dsa/mv88e6060.c:261:25: warning: format '%p' expects argument of type 'void *', but argument 4 has type 'long int' [-Wformat=]
261 | "port %d: unable to read status register: %pe\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:110:30: note: in definition of macro 'dev_printk_index_wrap'
110 | _p_func(dev, fmt, ##__VA_ARGS__); \
| ^~~
include/linux/dev_printk.h:144:56: note: in expansion of macro 'dev_fmt'
144 | dev_printk_index_wrap(_dev_err, KERN_ERR, dev, dev_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~
drivers/net/dsa/mv88e6060.c:260:17: note: in expansion of macro 'dev_err'
260 | dev_err(ds->dev,
| ^~~~~~~
drivers/net/dsa/mv88e6060.c:261:68: note: format string is defined here
261 | "port %d: unable to read status register: %pe\n",
| ~^
| |
| void *
| %ld
vim +/PTR_ERR +262 drivers/net/dsa/mv88e6060.c
249
250 static void mv88e6060_phylink_get_caps(struct dsa_switch *ds, int port,
251 struct phylink_config *config)
252 {
253 unsigned long *interfaces = config->supported_interfaces;
254 struct mv88e6060_priv *priv = ds->priv;
255 int addr = REG_PORT(port);
256 int ret;
257
258 ret = reg_read(priv, addr, PORT_STATUS);
259 if (ret < 0) {
260 dev_err(ds->dev,
> 261 "port %d: unable to read status register: %pe\n",
> 262 port, PTR_ERR(ret));
263 return;
264 }
265
266 if (!(ret & PORT_STATUS_PORTMODE)) {
267 /* Port configured in SNI mode (acts as a 10Mbps PHY) */
268 config->mac_capabilities = MAC_10 | MAC_SYM_PAUSE;
269 /* I don't think SNI is SMII - SMII has a sync signal, and
270 * SNI doesn't.
271 */
272 __set_bit(PHY_INTERFACE_MODE_SMII, interfaces);
273 return;
274 }
275
276 config->mac_capabilities = MAC_100 | MAC_10 | MAC_SYM_PAUSE;
277
278 if (port >= 4) {
279 /* Ports 4 and 5 can support MII, REVMII and REVRMII modes */
280 __set_bit(PHY_INTERFACE_MODE_MII, interfaces);
281 __set_bit(PHY_INTERFACE_MODE_REVMII, interfaces);
282 __set_bit(PHY_INTERFACE_MODE_REVRMII, interfaces);
283 }
284 if (port <= 4) {
285 /* Ports 0 to 3 have internal PHYs, and port 4 can optionally
286 * use an internal PHY.
287 */
288 /* Internal PHY */
289 __set_bit(PHY_INTERFACE_MODE_INTERNAL, interfaces);
290 /* Default phylib interface mode */
291 __set_bit(PHY_INTERFACE_MODE_GMII, interfaces);
292 }
293 }
294
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-08-09 12:32 [PATCH net-next] net: dsa: mv88e6060: add phylink_get_caps implementation Russell King (Oracle)
2023-08-09 13:45 ` Andrew Lunn
2023-08-09 13:48 ` Russell King (Oracle)
2023-08-09 14:19 ` kernel test robot
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