From: Daniel Golle <daniel@makrotopia.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Sabrina Dubroca <sd@queasysnail.net>,
Jianhui Zhao <zhaojh329@gmail.com>,
Chen-Yu Tsai <wenst@chromium.org>,
"Garmin.Chang" <Garmin.Chang@mediatek.com>,
Sam Shih <sam.shih@mediatek.com>,
Frank Wunderlich <frank-w@public-files.de>,
Dan Carpenter <dan.carpenter@linaro.org>,
James Liao <jamesjj.liao@mediatek.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, netdev@vger.kernel.org
Subject: Re: [PATCH v3 2/4] dt-bindings: clock: mediatek: add clock controllers of MT7988
Date: Wed, 6 Dec 2023 12:45:40 +0000 [thread overview]
Message-ID: <ZXBs9GOOOlZrMuSW@makrotopia.org> (raw)
In-Reply-To: <3e72bff6-9f4d-4cd4-845e-b065f1233ec6@collabora.com>
On Wed, Dec 06, 2023 at 11:59:54AM +0100, AngeloGioacchino Del Regno wrote:
> Il 06/12/23 01:57, Daniel Golle ha scritto:
> > Add various clock controllers found in the MT7988 SoC to existing
> > bindings (if applicable) and add files for the new ethwarp, mcusys
> > and xfi-pll clock controllers not previously present in any SoC.
> >
> > Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> > ---
> > v3:
> > * move clock bindings to clock folder
> > * drop ti,syscon-reset from bindings and example
> > * merge mcusys with topckgen bindings
> >
> > v2:
> > * dropped unused labels
> > * add 'type: object' declaration for reset-controller found in new
> > ethwarp controller and represented as ti,syscon-reset
> > * rebase on top of
> > "dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema"
> >
> > .../arm/mediatek/mediatek,infracfg.yaml | 1 +
> > .../bindings/clock/mediatek,apmixedsys.yaml | 1 +
> > .../bindings/clock/mediatek,ethsys.yaml | 1 +
> > .../clock/mediatek,mt7988-ethwarp.yaml | 49 +++++++++++++++++++
> > .../clock/mediatek,mt7988-xfi-pll.yaml | 48 ++++++++++++++++++
> > .../bindings/clock/mediatek,topckgen.yaml | 2 +
> > .../bindings/net/pcs/mediatek,sgmiisys.yaml | 13 +++--
> > 7 files changed, 112 insertions(+), 3 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt7988-ethwarp.yaml
> > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt7988-xfi-pll.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
> > index ea98043c6ba3d..230b5188a88db 100644
> > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
> > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
> > @@ -30,6 +30,7 @@ properties:
> > - mediatek,mt7629-infracfg
> > - mediatek,mt7981-infracfg
> > - mediatek,mt7986-infracfg
> > + - mediatek,mt7988-infracfg
> > - mediatek,mt8135-infracfg
> > - mediatek,mt8167-infracfg
> > - mediatek,mt8173-infracfg
> > diff --git a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
> > index 372c1d744bc27..685535846cbb7 100644
> > --- a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
> > +++ b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
> > @@ -22,6 +22,7 @@ properties:
> > - mediatek,mt7622-apmixedsys
> > - mediatek,mt7981-apmixedsys
> > - mediatek,mt7986-apmixedsys
> > + - mediatek,mt7988-apmixedsys
> > - mediatek,mt8135-apmixedsys
> > - mediatek,mt8173-apmixedsys
> > - mediatek,mt8516-apmixedsys
> > diff --git a/Documentation/devicetree/bindings/clock/mediatek,ethsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,ethsys.yaml
> > index 94d42c8647777..f9cddacc2eae1 100644
> > --- a/Documentation/devicetree/bindings/clock/mediatek,ethsys.yaml
> > +++ b/Documentation/devicetree/bindings/clock/mediatek,ethsys.yaml
> > @@ -22,6 +22,7 @@ properties:
> > - mediatek,mt7629-ethsys
> > - mediatek,mt7981-ethsys
> > - mediatek,mt7986-ethsys
> > + - mediatek,mt7988-ethsys
> > - const: syscon
> > - items:
> > - const: mediatek,mt7623-ethsys
> > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7988-ethwarp.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7988-ethwarp.yaml
> > new file mode 100644
> > index 0000000000000..9b919a155eb13
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7988-ethwarp.yaml
> > @@ -0,0 +1,49 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7988-ethwarp.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek MT7988 ethwarp Controller
> > +
> > +maintainers:
> > + - Daniel Golle <daniel@makrotopia.org>
> > +
> > +description:
> > + The Mediatek MT7988 ethwarp controller provides clocks and resets for the
> > + Ethernet related subsystems found the MT7988 SoC.
> > + The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: mediatek,mt7988-ethwarp
> > + - const: syscon
> > + - const: simple-mfd
>
> No, this is not a mfd, I say.
>
> Prove me wrong! :-)
https://github.com/dangowrt/linux/blob/mt7988-for-next/arch/arm64/boot/dts/mediatek/mt7988a.dtsi#L564
The 'simple-mfd' compatible is required to have the Linux
kernel probe drivers for sub-nodes -- several drivers will act on
the different aspects of the circuit exposed at this memory range.
From what I understand, this is the definition of a MFD.
>
> ..snip..
>
> > diff --git a/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml b/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml
> > index 66a95191bd776..68632cda334bd 100644
> > --- a/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml
> > +++ b/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml
> > @@ -15,15 +15,22 @@ description:
> > properties:
> > compatible:
> > - items:
> > - - enum:
> > + oneOf:
> > + - items:
> > + - enum:
> > - mediatek,mt7622-sgmiisys
> > - mediatek,mt7629-sgmiisys
> > - mediatek,mt7981-sgmiisys_0
> > - mediatek,mt7981-sgmiisys_1
> > - mediatek,mt7986-sgmiisys_0
> > - mediatek,mt7986-sgmiisys_1
> > - - const: syscon
> > + - const: syscon
> > + - items:
> > + - enum:
> > + - mediatek,mt7988-sgmiisys_0
> > + - mediatek,mt7988-sgmiisys_1
> > + - const: syscon
> > + - const: simple-mfd
>
> Same.
>
> Cheers,
> Angelo
next prev parent reply other threads:[~2023-12-06 12:46 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-06 0:55 [PATCH v3 1/4] dt-bindings: clock: mediatek: add MT7988 clock IDs Daniel Golle
2023-12-06 0:57 ` [PATCH v3 2/4] dt-bindings: clock: mediatek: add clock controllers of MT7988 Daniel Golle
2023-12-06 10:21 ` Krzysztof Kozlowski
2023-12-06 10:59 ` AngeloGioacchino Del Regno
2023-12-06 12:45 ` Daniel Golle [this message]
2023-12-07 17:03 ` Krzysztof Kozlowski
2023-12-07 17:17 ` Daniel Golle
2023-12-07 17:23 ` Krzysztof Kozlowski
2023-12-06 0:57 ` [PATCH v3 3/4] clk: mediatek: Add pcw_chg_shift control Daniel Golle
2023-12-06 10:38 ` AngeloGioacchino Del Regno
2023-12-09 0:10 ` Daniel Golle
2023-12-06 0:57 ` [PATCH v3 4/4] clk: mediatek: add drivers for MT7988 SoC Daniel Golle
2023-12-06 10:58 ` AngeloGioacchino Del Regno
2023-12-06 10:20 ` [PATCH v3 1/4] dt-bindings: clock: mediatek: add MT7988 clock IDs Krzysztof Kozlowski
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