From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D35C055E50; Thu, 21 Dec 2023 16:26:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SMoY3NDc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1703175999; x=1734711999; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=hwyVMnz8YfEfXRJSEPnKQv9pdm2VBlr6t+hTTgnb3c4=; b=SMoY3NDc/Stp/R7zjnWgT6AfIweO9VNoyrEpJVBWPclRlPpKLM2SU3Yy WbcSTXa0o1+Xju+T3a4fsUKl4R1d8ob+xikKGfBNm/h+hiRVpvwoZSAdy VJfgN2+c8Kf+SqYCiguTKcYLxRMExrn72LtEcDOf2Abn1XPV6X3ADP4Jh PE/yF2Vd9IouKR83B9WUk6yERROVghgZgd6MNwVDnrhzVpeSJCiEINbWk k1XiMhP8QxEC7NfaRNeuxZVT+P2XOnePUL0647ybNhCk2HZ2gsKf/kB7L gBhYfyQ+JQoNPpXQProdALQKxxaUJENkH7OGLm5HaGWcTJxedB/75rw8W g==; X-IronPort-AV: E=McAfee;i="6600,9927,10931"; a="3232827" X-IronPort-AV: E=Sophos;i="6.04,293,1695711600"; d="scan'208";a="3232827" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Dec 2023 08:26:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10931"; a="847157610" X-IronPort-AV: E=Sophos;i="6.04,293,1695711600"; d="scan'208";a="847157610" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga004.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Dec 2023 08:26:18 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rGLsE-00000007tTx-3bFd; Thu, 21 Dec 2023 18:26:14 +0200 Date: Thu, 21 Dec 2023 18:26:14 +0200 From: Andy Shevchenko To: lakshmi.sowjanya.d@intel.com Cc: tglx@linutronix.de, jstultz@google.com, giometti@enneenne.com, corbet@lwn.net, linux-kernel@vger.kernel.org, x86@kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, intel-wired-lan@lists.osuosl.org, eddie.dong@intel.com, christopher.s.hall@intel.com, jesse.brandeburg@intel.com, davem@davemloft.net, alexandre.torgue@foss.st.com, joabreu@synopsys.com, mcoquelin.stm32@gmail.com, perex@perex.cz, linux-sound@vger.kernel.org, anthony.l.nguyen@intel.com, pandith.n@intel.com, mallikarjunappa.sangannavar@intel.com, thejesh.reddy.t.r@intel.com Subject: Re: [RFC PATCH v2 08/10] pps: generators: Add PPS Generator TIO Driver Message-ID: References: <20231221093254.9599-1-lakshmi.sowjanya.d@intel.com> <20231221093254.9599-9-lakshmi.sowjanya.d@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231221093254.9599-9-lakshmi.sowjanya.d@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Thu, Dec 21, 2023 at 03:02:52PM +0530, lakshmi.sowjanya.d@intel.com wrote: > From: Lakshmi Sowjanya D > > The Intel Timed IO PPS generator driver outputs a PPS signal using > dedicated hardware that is more accurate than software actuated PPS. > The Timed IO hardware generates output events using the ART timer. > The ART timer period varies based on platform type, but is less than 100 > nanoseconds for all current platforms. Timed IO output accuracy is > within 1 ART period. > > PPS output is enabled by writing '1' the 'enable' sysfs attribute. The > driver uses hrtimers to schedule a wake-up 10 ms before each event > (edge) target time. At wakeup, the driver converts the target time in > terms of CLOCK_REALTIME to ART trigger time and writes this to the Timed > IO hardware. The Timed IO hardware generates an event precisely at the > requested system time without software involvement. ... > +#include > +#include > +#include + container_of.h > +#include + device.h + err.h + hrtimer.h > +#include + kstrtox.h > +#include > +#include > +#include + spinlock.h + sysfs.h > +#include > +#include -- With Best Regards, Andy Shevchenko